Bug ID: 37059
Summary: [X86] SLM has incorrect scheduling information for
OS: Windows NT
Component: Backend: X86
I had tried to fix this in r328914, but got perf regressions in some benchmarks
in Intel's internal list. So I reverted it back to old behavior in r329593.
Looking at the benchmarks, they regressed in 32-bit mode and it looks like
register pressure may have increased leading to additional spills. But I
thought 32-bit mode scheduling favored register pressure so I'm not sure what's
You are receiving this mail because:
You are on the CC list for the bug.
llvm-bugs mailing list