https://bugs.llvm.org/show_bug.cgi?id=39319
Bug ID: 39319
Summary: [AMDGPU][MC] SOP2 instructions accept 2 different
literals
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: AMDGPU
Assignee: unassignedb...@nondot.org
Reporter: dpreobrazhen...@luxoft.com
CC: llvm-bugs@lists.llvm.org
SOP2 instructions cannot use more than one 32-bit literal. When two different
literals are specified, assembler should detect this and trigger an error.
However, current implementation encodes the first literal and silently ignores
the second one. For example:
s_add_u32 s1, 0x123, 0x1234
is assembled without errors and result in the following code:
0xff,0xff,0x01,0x80,0x23,0x01,0x00,0x00
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