https://bugs.llvm.org/show_bug.cgi?id=39665
Bug ID: 39665
Summary: [X86][SSE] Masked memory op expansion could use MOVMSK
to simplify mask handling
Product: libraries
Version: trunk
Hardware: PC
OS: Windows NT
Status: NEW
Severity: enhancement
Priority: P
Component: Backend: X86
Assignee: [email protected]
Reporter: [email protected]
CC: [email protected], [email protected],
[email protected], [email protected]
define <2 x double> @load_v2f64_v2i64(<2 x i64> %trigger, <2 x double>* %addr,
<2 x double> %dst) {
; SSE42-LABEL: load_v2f64_v2i64:
; SSE42: ## %bb.0:
; SSE42-NEXT: pxor %xmm2, %xmm2
; SSE42-NEXT: pcmpeqq %xmm0, %xmm2
; SSE42-NEXT: pextrb $0, %xmm2, %eax
; SSE42-NEXT: testb $1, %al
; SSE42-NEXT: je LBB1_2
; SSE42-NEXT: ## %bb.1: ## %cond.load
; SSE42-NEXT: movlpd {{.*#+}} xmm1 = mem[0],xmm1[1]
; SSE42-NEXT: LBB1_2: ## %else
; SSE42-NEXT: pextrb $8, %xmm2, %eax
; SSE42-NEXT: testb $1, %al
; SSE42-NEXT: je LBB1_4
; SSE42-NEXT: ## %bb.3: ## %cond.load1
; SSE42-NEXT: movhpd {{.*#+}} xmm1 = xmm1[0],mem[0]
; SSE42-NEXT: LBB1_4: ## %else2
; SSE42-NEXT: movapd %xmm1, %xmm0
; SSE42-NEXT: retq
%mask = icmp eq <2 x i64> %trigger, zeroinitializer
%res = call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* %addr,
i32 4, <2 x i1>%mask, <2 x double>%dst)
ret <2 x double> %res
}
declare <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>*, i32, <2 x
i1>, <2 x double>)
This can replace all the pextrb with a single movmsk to something like:
pxor %xmm2, %xmm2
pcmpeqq %xmm0, %xmm2
movmskpd %xmm2, %eax
testb $1, %al
jne LBB1_2
## %bb.1: ## %cond.load
movlpd {{.*#+}} xmm1 = mem[0],xmm1[1]
LBB1_2: ## %else
testb $2, %al
jne LBB1_4
## %bb.3: ## %cond.load1
movhpd {{.*#+}} xmm1 = xmm1[0],mem[0]
LBB1_4: ## %else2
movapd %xmm1, %xmm0
retq
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