Bug ID: 41504
Summary: Use of lsl with w registers should warn/error
Component: Backend: AArch64
https://android-review.googlesource.com/c/platform/art/+/940018 shows a fix
that Android's ART team recently made. From that commit, they previously had
inline assembly that did "add x0, x1, w2, lsl #1", which was invalid and would
be treated as "add x0, x1, x2, uxtx #1" which would keep the high bits. They
had to manually change it to do "uxtw" to ignore the high bits.
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