https://bugs.llvm.org/show_bug.cgi?id=42483
Bug ID: 42483
Summary: __clear_cache for AArch64 might work incorrectly on
Cortex-A53
Product: compiler-rt
Version: unspecified
Hardware: PC
OS: Linux
Status: NEW
Severity: normal
Priority: P
Component: compiler-rt
Assignee: unassignedb...@nondot.org
Reporter: malts...@gmail.com
CC: llvm-bugs@lists.llvm.org
According to Arm erratum 824069
(http://infocenter.arm.com/help/topic/com.arm.doc.epm048406/Cortex_A53_MPCore_Software_Developers_Errata_Notice_v20.pdf,
page 28) on some releases Cortex-A53 the "dc cvau" instruction (which is used
in clear_cache.c:__clear_cache) might not clear the cache line correctly in
certain circumstances. As a workaround, it is recommended to use the "dc civac"
instruction instead.
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