https://bugs.llvm.org/show_bug.cgi?id=43399
Bug ID: 43399
Summary: Are we missing nsw/nuw tags on vector operations?
Product: libraries
Version: trunk
Hardware: PC
OS: Windows NT
Status: NEW
Severity: enhancement
Priority: P
Component: Scalar Optimizations
Assignee: unassignedb...@nondot.org
Reporter: llvm-...@redking.me.uk
CC: llvm-bugs@lists.llvm.org, nunoplo...@sapo.pt,
spatel+l...@rotateright.com
Split off from https://bugs.llvm.org/show_bug.cgi?id=43310
https://gcc.godbolt.org/z/iOcKcj
#include <stdint.h>
#include <x86intrin.h>
auto add_i32(int x, int y) {
return x + y;
}
auto add_v4i32(__v4si x, __v4si y) {
return x + y;
}
clang -g0 -O3 -march=btver2 -emit-llvm
define i32 @add_i32(i32 %0, i32 %1) {
%3 = add nsw i32 %1, %0
ret i32 %3
}
define <4 x i32> @add_v4i32(<4 x i32> %0, <4 x i32> %1) {
%3 = add <4 x i32> %1, %0
ret <4 x i32> %3
}
While we tag the scalar op with nsw we fail to do this for the vector version.
If we explicitly reduce the range of the vector values then nsw does reappear:
auto add_ashr_v4i32(__v4si x, __v4si y) {
x >>= 15;
y >>= 15;
return x + y;
}
define <4 x i32> @add_ashr_v4i32(<4 x i32> %0, <4 x i32> %1) {
%3 = ashr <4 x i32> %0, <i32 15, i32 15, i32 15, i32 15>
%4 = ashr <4 x i32> %1, <i32 15, i32 15, i32 15, i32 15>
%5 = add nsw <4 x i32> %4, %3
ret <4 x i32> %5
}
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