https://bugs.llvm.org/show_bug.cgi?id=44392
Bug ID: 44392
Summary: In PTX inline assembly, special registers prefixed by
`%` are rejected but those prefixed by `%%` are
accepted
Product: clang
Version: trunk
Hardware: PC
OS: Linux
Status: NEW
Severity: enhancement
Priority: P
Component: CUDA
Assignee: unassignedclangb...@nondot.org
Reporter: brycelelb...@gmail.com
CC: llvm-bugs@lists.llvm.org
NVIDIA's PTX assembly language has special registers, which are read-only
variables accessible through the `mov` or `cvt` instructions. Special registers
have alphanumeric names, and are referenced in PTX assembly in the same way
that registers are; by prefixing the special register name with `%`.
However, Clang CUDA seems to reject the use of PTX special registers in inline
assembly when they are prefixed with only a single `%`. Clang CUDA does accept
the use of special registers when they are prefixed with '%%' instead. NVCC
appears to also accept this, although it is not documented.
My guess is that '%%' is an escape sequence in both cases, passing a single `%`
through to the actual assembler.
It would be nice if Clang CUDA supported the use of PTX special registers
prefixed by a single `%` for consistency with NVCC.
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#special-registers
https://godbolt.org/z/AEU3Fa
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