https://bugs.llvm.org/show_bug.cgi?id=45167
Bug ID: 45167
Summary: Teach instruction scheduling and other reordering
passes about LFENCE speculation barrier semantics
Product: new-bugs
Version: unspecified
Hardware: PC
OS: Linux
Status: NEW
Severity: enhancement
Priority: P
Component: new bugs
Assignee: [email protected]
Reporter: [email protected]
CC: [email protected], [email protected]
Problem
We added speculation barrier semantics to LFENCE, but haven't taught
instruction scheduling (or other reordering passes) about that semantic.
The compiler may reorder LFENCEs in a basic block in a way that may not be
correct, whether reordering branch instructions and LFENCEs or loads/stores and
LFENCEs.
Possible directions to go in for a test case:
A MIR basic block with LFENCEs interleaved with multiple `jCC` instructions --
it is not valid to sink or hoist the LFENCEs.
Another posible testing strategy would be to interleave stores with an LFENCE.
For example, store -> LFENCE -> load: historically changing this to LFENCE ->
store -> load is okay, but from the perspective of speculative execution there
is a difference between the two orderings.
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