https://bugs.llvm.org/show_bug.cgi?id=49712
Bug ID: 49712
Summary: [MCA] In-order pipeline does not terminate for some
AMDGPU instructions
Product: tools
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: normal
Priority: P
Component: llvm-mca
Assignee: [email protected]
Reporter: [email protected]
CC: [email protected], [email protected],
[email protected]
MCA does not terminate for AMDGPU/gfx10-double.s:
; FIXME: This instructions sends llvm-mca into an infinite loop
;v_div_scale_f64 v[0:1], vcc_lo, v[0:1], v[0:1], v[0:1]
The problem is that the instruction has 2 uops, and the processor's IssueWidth
is 1.
InOrderIssueStage treats IssueWidth as the maximum number of uops that can be
issued in one cycle. On the other hand, the documentation for MCSchedModel says
that IssueWidth is the maximum number of *instructions*.
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