| Issue |
53016
|
| Summary |
Register Allocation Error
|
| Labels |
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| Assignees |
|
| Reporter |
wangcheng22
|
I uses the following command to generate RISC-V assembly code from llvm bytecode:
llc -march=riscv64 -mattr=+m,+a,+f,+d,+c,+experimental-v -riscv-v-vector-bits-min=128 test.ll
In the following generated assembly code, the register **s1** is used as both general register and frame-pointer for spill, which causes memory fault during execution.
[test.zip](https://github.com/llvm/llvm-project/files/7817425/test.zip)
mv **s1**, sp
...
.LBB1_6: # %no_errors_bb
ld a0, 40(s11)
fmv.w.x ft0, a7
lw a4, 16(a0)
lw a3, 20(a0)
lw **s1**, 0(a0)
lw a1, 4(a0)
sd a4, 648(**s1**) # 8-byte Folded Spill
srai a5, a4, 4
sd a3, 728(**s1**) # 8-byte Folded Spill
srai a3, a3, 4
add a4, a3, a5
sd **s1**, 616(**s1**) # 8-byte Folded Spill
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