| Issue |
56065
|
| Summary |
[AMDGPU][MC][GFX11] Incorrect disassembly of v_cmpx*_e64_dpp
|
| Labels |
bug,
backend:AMDGPU,
mc
|
| Assignees |
dpreobra
|
| Reporter |
dpreobra
|
These opcodes are either decoded incorrectly or crash disassembler.
An example of failed test:
0x00,0x00,0xfd,0xd4,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff
Expected result:
v_cmpx_class_f16_e64 v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf
Actual output:
v_cmpx_class_f16_e64 v2, /*invalid immediate*/ quad_perm:[3,3,0,0] row_mask:0xf bank_mask:0x0
The reason for this bug is that these opcodes no longer have `VOPC` flag and `convertVOPCDPPInst` is not called:
https://github.com/llvm/llvm-project/blob/cd53e6b48b676153e0e54dd5e73ab8a351db275b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp#L447
I'm going to fix this by checking for `AMDGPU::OpName::old` operand instead. Is there a better way to identify `VOPC` opcodes in this context?
@Sisyph @jayfoad @rampitec
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