| Issue |
63320
|
| Summary |
[ARM]: Incorrect ARMHF vector_size ABI for VFP-only
|
| Labels |
|
| Assignees |
|
| Reporter |
easyaspi314
|
Related to #62994.
According to the [EABI documentation](https://github.com/ARM-software/abi-aa/blob/844a79fd4c77252a11342709e3b27b2c9f590cf1/aapcs32/aapcs32.rst#vfp-and-simd-vector-register-arguments), the hard float ABI passes 64-bit and 128-bit containerized vectors in VFP registers, regardless of whether vectors are available. This is what GCC does, even if it can't legalize the vector type.
However, on hard float without NEON (e.g. Raspbian), Clang unpacks them into individual arguments.
This results in integer vectors being passed in r0-r3, and float/double registers to not be aligned to doubleword or quadword register pairs.
| args | AAPCS | Clang VFP |
| :-- | :--| :-- |
| i32x2 a | d0 (s0-s1) | **r0-r1** |
| i32x4 a | q0 (s0-s3) | **r0-r3** |
| f32 a, i32x2 b | s0, d1 (s2-s3) | s0, **r0-r1** |
| f32 a, i32x4 b | s0, q1 (s4-s7) | s0, **r0-r3** |
| f32 a, f32x2 b | s0, d1 (s2-s3) | s0, **s1-s2** |
| f32 a, f64x2 b | s0, q1 (s4-s7) | s0, **d1-d2 (s2-s5)** |
https://godbolt.org/z/73Kjc5zaM
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