| Issue |
75784
|
| Summary |
[InstCombine] Fold `select (a != V1 & a != V2), V1, a` to `select (a == V2), V2, V1`
|
| Labels |
new issue
|
| Assignees |
|
| Reporter |
XChy
|
Alive2 proof: https://alive2.llvm.org/ce/z/4_WZ9s
### Description:
```llvm
define i32 @src(i32 %a, i32 noundef %v1, i32 noundef %v2) {
entry:
%cmp = icmp ne i32 %a, %v1
%cmp1 = icmp ne i32 %a, %v2
%or.cond = and i1 %cmp, %cmp1
%select = select i1 %or.cond, i32 %v1, i32 %a
ret i32 %select
}
```
can be folded to:
```llvm
define i32 @tgt(i32 %a, i32 noundef %v1, i32 noundef %v2) {
entry:
%switch.selectcmp = icmp eq i32 %a, %v2
%switch.select = select i1 %switch.selectcmp, i32 %v2, i32 %v1
ret i32 %switch.select
}
```
### Real-world motivation
This snippet of IR is derived from [linux/lib/hexdump.c@hex_dump_to_buffer](https://github.com/torvalds/linux/blob/ceb6a6f023fd3e8b07761ed900352ef574010bcb/lib/hexdump.c#L127) (after O3 pipeline).
The example above is a reduced version. If you're interested in the original suboptimal IR and optimal IR, see also:https://godbolt.org/z/8K3qqzMzr
**Let me know if you can confirm that it's an optimization opportunity, thanks.**
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