| Issue |
84620
|
| Summary |
[AArch64] Fold the add + neg into sub for vscale
|
| Labels |
new issue
|
| Assignees |
|
| Reporter |
vfdff
|
* test: https://gcc.godbolt.org/z/qYa99E9Ef
> We fold the sub into add in [D74782](https://reviews.llvm.org/D74782), while it is not efficient to generate a negitive value, such as (vscale * -C) in Isel.
```
define i32 @combine_mul_vscale_i32(i32 %base) nounwind {
%vscale = call i32 @llvm.vscale.i32()
%shl = mul i32 %vscale, 2
%sub = sub i32 %base, %shl
ret i32 %sub
}
combine_mul_vscale_i32: // @combine_mul_vscale_i32
cntd x8
neg x8, x8
add w0, w0, w8
ret
```
* Here are the dump of Isel for **vscale Constant:i64<-2>** and **vscale Constant:i64<32>**
```
ISEL: Starting selection on root node: t69: i64 = vscale Constant:i64<-2>
ISEL: Starting pattern match
...
Created node: t99: i64 = CNTD_XPiI TargetConstant:i32<31>, TargetConstant:i32<1>
Morphed node: t69: i64 = SUBXrs Register:i64 $xzr, t99, TargetConstant:i64<0>
ISEL: Match complete!
ISEL: Starting selection on root node: t46: i64 = vscale Constant:i64<32>
ISEL: Starting pattern match
Initial Opcode index to 328581
Morphed node: t46: i64 = RDVLI_XI TargetConstant:i32<2>
ISEL: Match complete!
```
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