| Issue |
109108
|
| Summary |
[Aarch64] Recognize simple `Addp` pattern
|
| Labels |
new issue
|
| Assignees |
|
| Reporter |
Validark
|
In Zig:
```zig
const std = @import("std");
export fn addp_attempt(x: @Vector(16, u8)) @Vector(8, u8) {
const a, const b = std.simd.deinterlace(2, x);
return a + b;
}
```
In LLVM:
```llvm
; ModuleID = 'BitcodeBuffer'
source_filename = "llvm_code"
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-linux-musl"
; Function Attrs: mustprogress nofree norecurse nosanitize_coverage nosync nounwind skipprofile willreturn memory(none) uwtable
define dso_local <8 x i8> @addp_attempt(<16 x i8> %0) local_unnamed_addr #0 {
%2 = shufflevector <16 x i8> %0, <16 x i8> poison, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
%3 = shufflevector <16 x i8> %0, <16 x i8> poison, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
%4 = add nuw <8 x i8> %2, %3
ret <8 x i8> %4
}
```
In assembly for the Apple M3:
```asm
addp_attempt: // @addp_attempt
xtn v1.8b, v0.8h
uzp2 v0.16b, v0.16b, v0.16b
add v0.8b, v1.8b, v0.8b
ret
```
I think it should just be:
```asm
addp_attempt:
addp v0.16b, v0.16b, v0.16b
ret
```
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