| Issue |
109694
|
| Summary |
`__riscv_vmulh_vv_i64m1` doesn't work with `__attribute__((target("arch=+v")))`
|
| Labels |
new issue
|
| Assignees |
|
| Reporter |
dzaima
|
The code:
```c
#include <riscv_vector.h>
__attribute__((target("arch=+v")))
vint64m1_t mulh_i64(vint64m1_t a, vint64m1_t b) {
return __riscv_vmulh_vv_i64m1(a, b, 2);
}
```
does not compile with `-march=rv64gc`, giving the error:
```
<source>:5:10: error: builtin requires at least one of the following extensions: v
5 | return __riscv_vmulh_vv_i64m1(a, b, 2);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
```
even though `+v` is explicitly added. `-march=rv64gcv` works, and so does an equivalent 32-bit operation. https://godbolt.org/z/qYYzeoxGa
[related (but listing different problems)](https://github.com/llvm/llvm-project/issues/56592)
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