Issue 110126
Summary [RISCV] Can't select f16 extract_vector_elt with zfhmin
Labels backend:RISC-V
Assignees
Reporter lukel97
    ```llvm
define half @f(<vscale x 4 x half> %v) {
  %x = extractelement <vscale x 4 x half> %v, i32 0
  ret half %x
}
```

With `-mattr=+v,+zfhmin,+zvfhmin` (or `+zfh`) we fail to select the extract_vector_elt:

```
LLVM ERROR: Cannot select: t5: f16 = extract_vector_elt t2, Constant:i64<0>
  t2: nxv4f16,ch = CopyFromReg t0, Register:nxv4f16 %0
    t1: nxv4f16 = Register %0
  t3: i64 = Constant<0>
```

However with only `-mattr=+v,+zvfhmin` we can lower this because the f16 gets softened:

```
Optimized lowered selection DAG: %bb.0 'f:'
SelectionDAG has 13 nodes:
  t0: ch,glue = EntryToken
              t2: nxv4f16,ch = CopyFromReg t0, Register:nxv4f16 %0
            t5: f16 = extract_vector_elt t2, Constant:i64<0>
 t6: i16 = bitcast t5
        t7: i32 = any_extend t6
      t9: i32 = or t7, Constant:i32<-65536>
    t10: f32 = bitcast t9
  t12: ch,glue = CopyToReg t0, Register:f32 $f10_f, t10
  t13: ch = RISCVISD::RET_GLUE t12, Register:f32 $f10_f, t12:1



Type-legalized selection DAG: %bb.0 'f:'
SelectionDAG has 12 nodes:
  t0: ch,glue = EntryToken
 t2: nxv4f16,ch = CopyFromReg t0, Register:nxv4f16 %0
          t15: nxv4i16 = bitcast t2
        t21: i64 = extract_vector_elt t15, Constant:i64<0>
      t18: i64 = or t21, Constant:i64<-65536>
    t20: f32 = RISCVISD::FMV_W_X_RV64 t18
  t12: ch,glue = CopyToReg t0, Register:f32 $f10_f, t20
  t13: ch = RISCVISD::RET_GLUE t12, Register:f32 $f10_f, t12:1
```
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