Issue 112818
Summary The branch instruction is compiled into other instructions after linking
Labels new issue
Assignees
Reporter muxiff
    Hi,
I have customized two branch instructions using the following class,
```
let DecoderNamespace = "Namspace" in {
  class BranchClassName<bit F, bits<3> funct3, string opcodestr>
    : RVInst<(outs), (ins GPR:$rs1, GPR:$rs2, simm12_lsb0:$imm11), 
              opcodestr, "$rs1, $rs2, $imm11", [], InstFormatB> {
    bits<5> rs1;
    bits<5> rs2;
    bits<11> imm11;

    let Inst{31} = F;
    let Inst{30-25} = imm11{9-4};
    let Inst{24-20} = rs2;
    let Inst{19-15} = rs1;
    let Inst{14-12} = funct3;
    let Inst{11-8} = imm11{3-0};
    let Inst{7} = imm11{10};
    let Inst{6-0} = OPC_CUSTOM_3.Value;

    let isBranch = 1;
    let isTerminator = 1;
  }
}
```
When I use them simultaneously in the same assembly file, the encoding and decoding I see when performing assembly and disassembly operations are one-to-one correspondence.
 However, when I compile this assembly file into a complete elf and then use disassembly tools to view it, I found that one of these two branch instructions has been compiled into the other. 
Can someone tell me why this is happening, or is there any other restriction that needs to be added to the class definition?

_______________________________________________
llvm-bugs mailing list
llvm-bugs@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs

Reply via email to