| Issue |
114691
|
| Summary |
[llvm-exegesis] Machine code verification error when setting ymm16 on non-avx512 system
|
| Labels |
tools:llvm-exegesis
|
| Assignees |
boomanaiden154
|
| Reporter |
boomanaiden154
|
Currently when trying to run llvm-exegesis and setting a register like ymm16 (a 128-bit/256-bit register only available through the AVX512 extensions), we get a machine code verification error when setting one of those registers:
```
# End machine code for function foo.
*** Bad machine code: Illegal physical register for instruction ***
- function: foo
- basic block: %bb.0 (0x7f8f3c5fe258)
- instruction: $ymm16 = VMOVDQUYrm $rsp, 1, $noreg, 0, $noreg
- operand 0: $ymm16
$ymm16 is not a VR256 register.
LLVM ERROR: Found 1 machine code errors.
```
We should probably just unconditionally use the SSE/AVX instructions for the lower registers and only use the AVX512 instructions for the upper registers.
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