| Issue |
129516
|
| Summary |
MachineCSE may not eliminate subexpression compeletely, result in more register using。
|
| Labels |
new issue
|
| Assignees |
|
| Reporter |
emelliu
|
The case is complicate, after simplifying mir like this.
```
bb.0:
def %a
def %b
bb.1:
successors: %bb.2, %bb.3
...
%cmp = cmp xxx
branch %bb.3, %cmp
jmp %bb.2
bb.2:
%1 = MUL_F32 %a, %b
%2 = MUL_F32 %1, %c
%3 = FSUB %1, %2
%4 = MAX %3, %d
...
jmp %bb.4
bb.3:
%4 = MUL_F32 %a, %b
%5 = MUL_F32 %4, %c
%6 = FSUB %4, %5
%7 = FSUB %6, %c
...
bb.4:
...
```
The expectation is machinecse can hoist common _expression_ <%1,%2,%3> and <%4, %5,%6>
but the reality is that after running machine-cse two times, it hoists <%1,%2> and <%4, %5> , so need more register to store temp value %4 and %5, if I run machine-cse once again, the %3 and %6 can be hoisted.
So I think machine cse has some problem。
I create new issue with new git account, please close the https://github.com/llvm/llvm-project/issues/128862。
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