| Issue |
147124
|
| Summary |
Should I do an instruction as illegal when there are two different eew addresses in the same register?
|
| Labels |
new issue
|
| Assignees |
|
| Reporter |
fengxh001
|
In Unprivileged Architecture, I found “An encoding that would result in the same vector register being read with two or more different EEWs, including when the vector register appears at different positions within two or more vector register groups, is reserved.”
eg：
1. vluxei16.v v4 （x16） v0 v0.t /// V0 have two eew, eew=sew and eew=1；
In spike，i don't find a illegal check for this case，Should I do this case as illegal Instruction？
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