Issue |
151329
|
Summary |
[NVPTX] MIR optimizations incorrectly deleting return value register
|
Labels |
backend:NVPTX
|
Assignees |
AlexMaclean
|
Reporter |
jhuber6
|
We are currently failing to build any of the NVPTX libc test suite. The following IR fails to validate with `ptxas` when run through the backend with optimizations https://godbolt.org/z/ahro9n3KE.
```llvm
target triple = "nvptx64-nvidia-cuda"
declare ptr @bar(i64)
declare i64 @baz()
define ptr @foo(i1 %cond) {
entry:
%call = call i64 @baz()
br i1 %cond, label %common.ret, label %bb
common.ret:
ret ptr null
bb:
%tmp = call ptr @bar(i64 %call)
br label %common.ret
}
```
```console
$ llc reduced.ll -mcpu=sm_89 -o reduced.s
$ ptxas -m64 -v --gpu-name sm_89 reduced.s -c
ptxas reduced.s, line 39; error : Illegal operand type to instruction 'ld'
ptxas reduced.s, line 39; error : Unknown symbol 'retval0'
```
If you look at the output PTX it just straight up deletes the `reval0` register without cleaning up its users. If you compile without optimizations the node is present, so it occurs due to some MIR optimization.
_______________________________________________
llvm-bugs mailing list
llvm-bugs@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs