Issue 154328
Summary Greedy picks wrong register to inflate to AV class
Labels backend:AMDGPU, llvm:regalloc, missed-optimization
Assignees
Reporter arsenm
    In this example greedy introduces a copy from VGPR to AGPR to avoid spilling, but it chooses the wrong register to do it for. If we inflated the registers around the MFMA, we could fold that into the AGPR form. Instead it chose the inline assembly defined value, which we can't do anything about. This should somehow prioritize splitting values that we can do this rewrite around.

[bad-av-split-selection.ll.zip](https://github.com/user-attachments/files/21856114/bad-av-split-selection.ll.zip)
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