Issue |
159723
|
Summary |
[X86] Invalid operand order for fp16 vector comparison
|
Labels |
new issue
|
Assignees |
|
Reporter |
azwolski
|
Godbolt: https://godbolt.org/z/WhjWaWqM5
While compiling the following functions:
```
declare <16 x half> @test_call_16()
define <16 x i1> @test_cmp_v16half_olt(<16 x half> %rhs, <16 x i1> %mask) nounwind {
%lhs = call <16 x half> @test_call_16()
%comp = fcmp olt <16 x half> %lhs, %rhs
%res = and <16 x i1> %comp, %mask
ret <16 x i1> %res
}
define <16 x i1> @test_cmp_v16half_olt_rev(<16 x half> %rhs, <16 x i1> %mask) nounwind {
%lhs = call <16 x half> @test_call_16()
%comp = fcmp olt <16 x half> %rhs, %lhs
%res = and <16 x i1> %comp, %mask
ret <16 x i1> %res
}
```
Despite reversing the operands in the comparison (`%lhs, %rhs` vs `%rhs, %lhs`), both functions generate identical assembly
```
sub rsp, 56
vmovups ymmword ptr [rsp + 16], ymm0
vpsllw xmm0, xmm1, 7
vpmovb2m k1, xmm0
kmovw word ptr [rsp + 14], k1
call test_call_16@PLT
kmovw k1, word ptr [rsp + 14]
vcmpltph k0 {k1}, ymm0, ymmword ptr [rsp + 16]
vpmovm2b xmm0, k0
add rsp, 56
vzeroupper
ret
```
The opcode remains `vcmpltph`. Changing the order of operands should reverse the comparison condition, but in this case, the generated assembly does not reflect that change.
I will submit a patch to address this issue.
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