Issue 161381
Summary [AMDGPU] True16 .l/.h register operands not disassembled as such
Labels backend:AMDGPU
Assignees broxigarchen
Reporter kosarev
    gfx1250_dasm_vop1.txt reads like the last operand is `v127.l` regardless of whether the True16 support is enabled or not:
```
0x7f,0xe5,0x0a,0x7e
# GFX1250: v_cvt_f32_bf16_e32 v5, v127.l           ; encoding: [0x7f,0xe5,0x0a,0x7e]
```

In gfx1250_asm_vop1.s the opposite is happening, with registers not being disassembled as .l/.h regardless of the True16 mode selected:
```
v_tanh_f16 v5, v1
// GFX1250: v_tanh_f16_e32 v5, v1                   ; encoding: [0x01,0x3f,0x0a,0x7e]
```

Caught on an attempt to turn these into round-tripping tests.
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