Issue 164782
Summary [X86] Failure to fold bit count instructions if EFLAGS is used
Labels backend:X86, missed-optimization
Assignees
Reporter RKSimon
    https://zig.godbolt.org/z/v6x91zxed
```ll
define i64 @lzcnt64(ptr %p0) {
  %a0 = load i64, ptr %p0, align 8
  %cnt = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %a0, i1 true)
  ret i64 %cnt
}
define i64 @lzcnt64_64(ptr %p0, i64 %a1) {
  %a0 = load i64, ptr %p0, align 8
  %cnt = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %a0, i1 true)
  %iszero = icmp eq i64 %a0, 0
  %res = select i1 %iszero, i64 %a1, i64 %cnt
  ret i64 %res
}
```
```asm
lzcnt64: # @lzcnt64
  lzcntq (%rdi), %rax
  retq
lzcnt64_64: # @lzcnt64_64
  movq (%rdi), %rax
 lzcntq %rax, %rax
  cmovbq %rsi, %rax
  retq
```
but should be:
```asm
lzcnt64_64: # @lzcnt64_64
  lzcntq (%rdi), %rax
  cmovbq %rsi, %rax
  retq
```
_______________________________________________
llvm-bugs mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs

Reply via email to