| Issue |
167203
|
| Summary |
Make `SILowerSGPRSpills::determineRegsForWWMAllocation` Accept Already Reserved Whole Wave Mode Registers from `llvm::SIMachineFunctionInfo`
|
| Labels |
new issue
|
| Assignees |
|
| Reporter |
matinraayai
|
Hi,
I want to pass an `llvm::MachineFunction` with the AMDGPU C calling convention a physical WWM register as a live-in. The physical WWM reg gets copied into a virtual register marked `WWM` in the entry basic block, and gets copied back to its original place at the end of each return block. For example, in a single MBB function with `$vgpr2` WWM as an argument, the MF's contents should look something like this:
```
Function Live Ins: $vgpr2
bb.0:
liveins: $vgpr2
%2:vgpr_32 = WWM_COPY $vgpr2
...
$vgpr2 = WWM_COPY %2:vgpr32
SI_RETURN implicit-def $vgpr2
```
The machine function is obtained in my modified codegen pipeline that can be found [here](https://github.com/matinraayai/Luthier/blob/main/src/lib/tooling_common/RunMIRPassesOnIModulePass.cpp), and I add the copy between the virtual and physical WWMs in one of the very early passes after ISEL.
IIUC before the WWM allocation happens in the AMDGPU Codegen pipeline, the `SILowerSGPRSpills` pass ends up selecting a set of physical VGPRs that are not used throughout the function, starting from the highest available on the subtarget as seen here:
https://github.com/llvm/llvm-project/blob/64ad5d976dbd9bb140d81440c7d9cb093278dd31/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp#L352-L388
In situations where my machine function uses all physical V/AGPRs available to it, this function fails to spot that there is at least one WWM register that can be used in the WWM register allocation. This is despite the fact that I copy those used physical registers to equivalent virtual registers to signal to the reg allocator that they can be spilled.
One possible fix for this is to make this function consider if there are any physical registers already in `WWMReservedRegs` field of `llvm::SIMachineFunctionInfo`. This way I can reserve my physical WWM early in the pipeline when I also emit the WWM copies, and set `--amdgpu-num-vgprs-for-wwm-alloc` to 1 if I face a VGPR shortage.
@shiltian @arsenm
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