Issue 175909
Summary Assertion "VPlan cost model and legacy cost model disagreed" when building Clang/LLVM for rv32gcv
Labels vectorizers, crash-on-valid
Assignees
Reporter asb
    Attempting to cross-compile Clang/LLVM targeting rv32gcv with recent HEAD we get some crashes from the "VPlan cost model and legacy cost model disagreed" assert in LoopVectorize.cpp.

Here is a reduced test case:
```
; ModuleID = 'reduced.bc'
target datalayout = "e-m:e-p:32:32-i64:64-n32-S128"
target triple = "riscv32-unknown-linux-gnu"

define ptr @_ZSt23__copy_move_backward_a2ILb1EPSt4pairIdyES2_ET1_T0_S4_S3_(ptr %__first, ptr %__last) {
entry:
  %__last.addr1 = alloca ptr, align 4
 %__result.addr = alloca ptr, align 4
  store ptr %__first, ptr %__result.addr, align 4
  br label %while.cond

while.cond: ; preds = %while.body, %entry
  %0 = phi ptr [ %.pre, %while.body ], [ %__last, %entry ]
  %cmp.not = icmp eq ptr %__first, %0
 br i1 %cmp.not, label %while.end, label %while.body

while.body: ; preds = %while.cond
  %incdec.ptr = getelementptr i8, ptr %0, i32 -16
  store ptr %incdec.ptr, ptr %__last.addr1, align 4
  %1 = load ptr, ptr %__result.addr, align 4
 %incdec.ptr1 = getelementptr i8, ptr %1, i32 -16
  store ptr %incdec.ptr1, ptr %__result.addr, align 4
  %2 = call ptr @_ZSt12__assign_oneILb1EPSt4pairIdyES2_EvRT0_RT1_(ptr %__result.addr, ptr %__last.addr1)
  %.pre = load ptr, ptr %__last.addr1, align 4
  br label %while.cond

while.end:                                        ; preds = %while.cond
  ret ptr null
}

define ptr @_ZSt12__assign_oneILb1EPSt4pairIdyES2_EvRT0_RT1_(ptr %__out, ptr %__in) {
entry:
  %0 = load ptr, ptr %__in, align 4
  %1 = load double, ptr %0, align 8
  %2 = load ptr, ptr %__out, align 4
  store double %1, ptr %2, align 8
  %second3.i = getelementptr i8, ptr %2, i32 8
  store i64 0, ptr %second3.i, align 8
  ret ptr null
}
```

Reproduce with `./build/rvrel/bin/clang++ --target=riscv32-linux-gnu -c -march=rv32gcv -O3 reduced.ll`

Does this checking of the VPlan vs legacy cost model still needed at this point, or is the VPlan based model mature enough to remove it?

CC @lukel97 
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