| Issue |
176356
|
| Summary |
[DAG] TargetLowering::expandCLMUL- avoid ISD::MUL if target hasBitTest
|
| Labels |
good first issue,
llvm:SelectionDAG
|
| Assignees |
|
| Reporter |
RKSimon
|
Current ISD::CLMUL expansion is:
```cpp
case ISD::CLMUL: {
SDValue Res = DAG.getConstant(0, DL, VT);
for (unsigned I = 0; I < BW; ++I) {
SDValue Mask = DAG.getConstant(APInt::getOneBitSet(BW, I), DL, VT);
SDValue YMasked = DAG.getNode(ISD::AND, DL, VT, Y, Mask);
SDValue Mul = DAG.getNode(ISD::MUL, DL, VT, X, YMasked);
Res = DAG.getNode(ISD::XOR, DL, VT, Res, Mul);
}
return Res;
}
```
but for targets with a fast bit test instruction (x86 BT for scalar types etc. - via TLI::hasBitTest()), it'd be much better to avoid the ISD::MUL nodes and do something like:
```
Res ^= (Y & (1<<I) ? (X<<I) : 0);
```
similar to how llvm::APIntOps::clmul computes a result
_______________________________________________
llvm-bugs mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs