| Issue |
177416
|
| Summary |
[GlobalISel] LegalizationArtifactCombiner for merge-unmerge->unmerge but src and std of result would be different scalar/vector types
|
| Labels |
new issue
|
| Assignees |
|
| Reporter |
petar-avramovic
|
```
---
name: test
body: |
bb.0.entry:
liveins: $vgpr0_vgpr1
%0:_(<4 x s16>) = COPY $vgpr0_vgpr1
%1:_(s16), %2:_(s16), %3:_(s16), %4:_(s16) = G_UNMERGE_VALUES %0:_(<4 x s16>)
%5:_(s32) = G_MERGE_VALUES %1:_(s16), %2:_(s16)
%6:_(s32) = G_MERGE_VALUES %3:_(s16), %4:_(s16)
$vgpr0 = COPY %5:_(s32)
$vgpr1 = COPY %6:_(s32)
...
```
to reproduce
llc -global-isel -mtriple=amdgcn -mcpu=gfx1200 -run-pass=legalizer test.mir -o -
Potential fixes:
1. LegalizationArtifactCombiner.h (search for `// Recognize UnmergeSrc that can be unmerged to DstTy directly.`)
just allow it, maybe also check if it the resulting instruction would be legal
2. do something with InstList, ArtifactList in Legalizer.cpp
What happens now is that none of the instructions were able to be combined,
if we only legalized ` %1:_(s16), %2:_(s16), %3:_(s16), %4:_(s16) = G_UNMERGE_VALUES %0:_(<4 x s16>)`
and went back to artifact combiner we would end up with desired result but instead
%5:_(s32) = G_MERGE_VALUES %1:_(s16), %2:_(s16)
%6:_(s32) = G_MERGE_VALUES %3:_(s16), %4:_(s16)
are both legalized (lowered to shifts and bitwise instructions)
For case 1, combine works on tests like this:
```
---
name: both_vec
body: |
bb.0.entry:
liveins: $vgpr0_vgpr1
%0:_(<4 x s16>) = COPY $vgpr0_vgpr1
%1:_(s16), %2:_(s16), %3:_(s16), %4:_(s16) = G_UNMERGE_VALUES %0:_(<4 x s16>)
%5:_(<2 x s16>) = G_BUILD_VECTOR %1:_(s16), %2:_(s16)
%6:_(<2 x s16>) = G_BUILD_VECTOR %3:_(s16), %4:_(s16)
$vgpr0 = COPY %5:_(<2 x s16>)
$vgpr1 = COPY %6:_(<2 x s16>)
...
---
name: test_both_scalar
body: |
bb.0.entry:
liveins: $vgpr0_vgpr1
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(s16), %2:_(s16), %3:_(s16), %4:_(s16) = G_UNMERGE_VALUES %0:_(s64)
%5:_(s32) = G_MERGE_VALUES %1:_(s16), %2:_(s16)
%6:_(s32) = G_MERGE_VALUES %3:_(s16), %4:_(s16)
$vgpr0 = COPY %5:_(s32)
$vgpr1 = COPY %6:_(s32)
...
```
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