| Issue |
177925
|
| Summary |
[AArch64] performSignExtendInRegCombine assert "Sign extending from an invalid type"
|
| Labels |
backend:AArch64,
crash-on-valid
|
| Assignees |
|
| Reporter |
sjoerdmeijer
|
This IR:
```
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "aarch64-unknown-linux-gnu"
define <vscale x 16 x i16> @_Z1dPb(<vscale x 16 x i8> %wide.masked.gather) #0 {
entry:
%0 = trunc <vscale x 16 x i8> %wide.masked.gather to <vscale x 16 x i1>
%1 = sext <vscale x 16 x i1> %0 to <vscale x 16 x i16>
ret <vscale x 16 x i16> %1
}
attributes #0 = { "target-cpu"="grace" }
```
Runs into this assert:
```
llc: /root/llvm-project/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:27778: llvm::SDValue performSignExtendInRegCombine(llvm::SDNode*, llvm::TargetLowering::DAGCombinerInfo&, llvm::SelectionDAG&): Assertion `(EltTy == MVT::i8 || EltTy == MVT::i16 || EltTy == MVT::i32) && "Sign extending from an invalid type"' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace and instructions to reproduce the bug.
Stack dump:
0. Program arguments: /opt/compiler-explorer/clang-assertions-trunk/bin/llc -o /app/output.s -x86-asm-syntax=intel <source>
1. Running pass 'Function Pass Manager' on module '<source>'.
2. Running pass 'AArch64 Instruction Selection' on function '@_Z1dPb'
#0 0x000000000425b998 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (/opt/compiler-explorer/clang-assertions-trunk/bin/llc+0x425b998)
#1 0x0000000004258874 SignalHandler(int, siginfo_t*, void*) Signals.cpp:0:0
#2 0x00007ca134442520 (/lib/x86_64-linux-gnu/libc.so.6+0x42520)
#3 0x00007ca1344969fc pthread_kill (/lib/x86_64-linux-gnu/libc.so.6+0x969fc)
#4 0x00007ca134442476 gsignal (/lib/x86_64-linux-gnu/libc.so.6+0x42476)
#5 0x00007ca1344287f3 abort (/lib/x86_64-linux-gnu/libc.so.6+0x287f3)
#6 0x00007ca13442871b (/lib/x86_64-linux-gnu/libc.so.6+0x2871b)
#7 0x00007ca134439e96 (/lib/x86_64-linux-gnu/libc.so.6+0x39e96)
#8 0x0000000000b33fbf performSignExtendInRegCombine(llvm::SDNode*, llvm::TargetLowering::DAGCombinerInfo&, llvm::SelectionDAG&) AArch64ISelLowering.cpp:0:0
#9 0x0000000000bd3a3c llvm::AArch64TargetLowering::PerformDAGCombine(llvm::SDNode*, llvm::TargetLowering::DAGCombinerInfo&) const (/opt/compiler-explorer/clang-assertions-trunk/bin/llc+0xbd3a3c)
#10 0x0000000003e7849f (anonymous namespace)::DAGCombiner::combine(llvm::SDNode*) DAGCombiner.cpp:0:0
```
See also: https://godbolt.org/z/5a99YqvcG
This is generated from this source code-reproducer:
```
#include <algorithm>
unsigned short a;
void d(bool b[]) {
#pragma clang loop vectorize_predicate(enable)
for (int c(-118); c < 21; c += 3)
a = std::min(a, (unsigned short)(b[c] ? -01 : 0));
}
```
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