| Issue |
202808
|
| Summary |
[MIPS] with `+msa`, `half` (i.e. `f16`) is broken
|
| Labels |
backend:MIPS
|
| Assignees |
|
| Reporter |
folkertdev
|
There seems to be some support for using `half` with `+msa`, but in practice there are many rough edges. For instance this fails
https://godbolt.org/z/z9hKz4WEd
```llvm
; llc -O3 -mattr=+fp64,+msa -mcpu=mips64r6
target triple = "mips64el-unknown-linux-gnuabi64"
define void @f(ptr align 2 %p) {
entry:
%h = load half, ptr %p, align 2
call void @g( half %h, i32 1)
ret void
}
declare void @g(half, i32 )
```
with assertions it reports
```
Call operand #0 has unhandled type f16
```
Or this snippet
https://godbolt.org/z/P6qW5z9fs
```llvm
; llc -O3 -mattr=+fp64,+msa -mcpu=mips64r5
target triple = "mips64-unknown-linux"
define half @repro(i64 %x) {
entry:
%h = sitofp i64 %x to half
ret half %h
}
```
resulting in
```
LLVM ERROR: Cannot select: t9: f16 = sint_to_fp t4
t4: i64,ch = CopyFromReg t0, Register:i64 %1
In function: repro
```
(I have a potential fix for this one in https://github.com/llvm/llvm-project/pull/201897)
I suspect that support for `f16` is a combination of old and incomplete? Is there anything that can be done to not be fixing these one-by-one in an ad-hoc way? There seem to be some similarities with the SystemZ backend where `f16` is also a storage-only type.
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