Changes in directory llvm/lib/Target/SparcV8:
SparcV8AsmPrinter.cpp updated: 1.45 -> 1.46 SparcV8ISelDAGToDAG.cpp updated: 1.12 -> 1.13 --- Log message: Teach the addressing mode stuff to fold "%lo" into 'ri' addressing modes, allowing us to compile this: to this: %G1 = external global int %G2 = external global int void %test() { %X = load int* %G1 store int %X, int* %G2 ret void } test: save -96, %sp, %sp sethi %hi(G1), %l0 ld [%l0+%lo(G1)], %l0 sethi %hi(G2), %l1 st %l0, [%l1+%lo(G2)] restore %g0, %g0, %g0 retl nop instead of this: test: save -96, %sp, %sp sethi %hi(G1), %l0 or %g0, %lo(G1), %l1 ld [%l1+%l0], %l0 sethi %hi(G2), %l1 or %g0, %lo(G2), %l2 st %l0, [%l2+%l1] restore %g0, %g0, %g0 retl nop --- Diffs of the changes: (+20 -1) SparcV8AsmPrinter.cpp | 8 +++++++- SparcV8ISelDAGToDAG.cpp | 13 +++++++++++++ 2 files changed, 20 insertions(+), 1 deletion(-) Index: llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp diff -u llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp:1.45 llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp:1.46 --- llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp:1.45 Sat Dec 17 14:04:49 2005 +++ llvm/lib/Target/SparcV8/SparcV8AsmPrinter.cpp Sat Dec 17 20:27:00 2005 @@ -186,7 +186,13 @@ void SparcV8AsmPrinter::printMemOperand(const MachineInstr *MI, int opNum) { printOperand(MI, opNum); O << "+"; - printOperand(MI, opNum+1); + if (MI->getOperand(opNum+1).getType() == MachineOperand::MO_GlobalAddress) { + O << "%lo("; + printOperand(MI, opNum+1); + O << ")"; + } else { + printOperand(MI, opNum+1); + } } Index: llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp diff -u llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.12 llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.13 --- llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp:1.12 Sat Dec 17 20:10:39 2005 +++ llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp Sat Dec 17 20:27:00 2005 @@ -309,6 +309,9 @@ if (isa<ConstantSDNode>(Addr.getOperand(1)) && Predicate_simm13(Addr.getOperand(1).Val)) return false; // Let the reg+imm pattern catch this! + if (Addr.getOperand(0).getOpcode() == V8ISD::Lo || + Addr.getOperand(1).getOpcode() == V8ISD::Lo) + return false; // Let the reg+imm pattern catch this! R1 = Select(Addr.getOperand(0)); R2 = Select(Addr.getOperand(1)); return true; @@ -328,6 +331,16 @@ Offset = CurDAG->getTargetConstant(CN->getValue(), MVT::i32); return true; } + if (Addr.getOperand(0).getOpcode() == V8ISD::Lo) { + Base = Select(Addr.getOperand(1)); + Offset = Addr.getOperand(0).getOperand(0); + return true; + } + if (Addr.getOperand(1).getOpcode() == V8ISD::Lo) { + Base = Select(Addr.getOperand(0)); + Offset = Addr.getOperand(1).getOperand(0); + return true; + } } Base = Select(Addr); Offset = CurDAG->getTargetConstant(0, MVT::i32); _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits