Changes in directory llvm/lib/Target/X86:
X86.h updated: 1.41 -> 1.42
X86ISelLowering.cpp updated: 1.60 -> 1.61
X86TargetMachine.cpp updated: 1.99 -> 1.100
---
Log message:
Bye bye Pattern ISel, hello DAG ISel.
---
Diffs of the changes: (+17 -17)
X86.h | 2 +-
X86ISelLowering.cpp | 12 ++++++------
X86TargetMachine.cpp | 20 ++++++++++----------
3 files changed, 17 insertions(+), 17 deletions(-)
Index: llvm/lib/Target/X86/X86.h
diff -u llvm/lib/Target/X86/X86.h:1.41 llvm/lib/Target/X86/X86.h:1.42
--- llvm/lib/Target/X86/X86.h:1.41 Fri Jan 27 02:10:46 2006
+++ llvm/lib/Target/X86/X86.h Fri Jan 27 15:26:54 2006
@@ -25,7 +25,7 @@
class IntrinsicLowering;
class MachineCodeEmitter;
-extern bool X86DAGIsel;
+extern bool X86PatIsel;
/// createX86ISelPattern - This pass converts an LLVM function into a
/// machine code representation using pattern matching and a machine
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.60
llvm/lib/Target/X86/X86ISelLowering.cpp:1.61
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.60 Fri Jan 27 15:09:22 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Fri Jan 27 15:26:54 2006
@@ -95,7 +95,7 @@
setOperationAction(ISD::BIT_CONVERT, MVT::f32, Expand);
setOperationAction(ISD::BIT_CONVERT, MVT::i32, Expand);
- if (X86DAGIsel) {
+ if (!X86PatIsel) {
setOperationAction(ISD::BRCOND , MVT::Other, Custom);
}
setOperationAction(ISD::BRCONDTWOWAY , MVT::Other, Expand);
@@ -118,7 +118,7 @@
setOperationAction(ISD::CTLZ , MVT::i32 , Expand);
setOperationAction(ISD::READCYCLECOUNTER , MVT::i64 , Custom);
- if (!X86DAGIsel) {
+ if (X86PatIsel) {
setOperationAction(ISD::BSWAP , MVT::i32 , Expand);
setOperationAction(ISD::ROTL , MVT::i8 , Expand);
setOperationAction(ISD::ROTR , MVT::i8 , Expand);
@@ -141,7 +141,7 @@
// These should be promoted to a larger select which is supported.
setOperationAction(ISD::SELECT , MVT::i1 , Promote);
setOperationAction(ISD::SELECT , MVT::i8 , Promote);
- if (X86DAGIsel) {
+ if (!X86PatIsel) {
// X86 wants to expand cmov itself.
setOperationAction(ISD::SELECT , MVT::i16 , Custom);
setOperationAction(ISD::SELECT , MVT::i32 , Custom);
@@ -218,7 +218,7 @@
// Set up the FP register classes.
addRegisterClass(MVT::f64, X86::RFPRegisterClass);
- if (X86DAGIsel) {
+ if (!X86PatIsel) {
setOperationAction(ISD::SINT_TO_FP, MVT::i16, Custom);
setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom);
}
@@ -456,7 +456,7 @@
break;
}
- if (X86DAGIsel) {
+ if (!X86PatIsel) {
std::vector<MVT::ValueType> NodeTys;
NodeTys.push_back(MVT::Other); // Returns a chain
NodeTys.push_back(MVT::Flag); // Returns a flag for retval copy to use.
@@ -932,7 +932,7 @@
break;
}
- if (X86DAGIsel) {
+ if (!X86PatIsel) {
// Build a sequence of copy-to-reg nodes chained together with token chain
// and flag operands which copy the outgoing args into registers.
SDOperand InFlag;
Index: llvm/lib/Target/X86/X86TargetMachine.cpp
diff -u llvm/lib/Target/X86/X86TargetMachine.cpp:1.99
llvm/lib/Target/X86/X86TargetMachine.cpp:1.100
--- llvm/lib/Target/X86/X86TargetMachine.cpp:1.99 Fri Jan 27 02:10:46 2006
+++ llvm/lib/Target/X86/X86TargetMachine.cpp Fri Jan 27 15:26:54 2006
@@ -26,7 +26,7 @@
#include <iostream>
using namespace llvm;
-bool llvm::X86DAGIsel = false;
+bool llvm::X86PatIsel = true;
/// X86TargetMachineModule - Note that this is used on hosts that cannot link
/// in a library unless there are references into the library. In particular,
@@ -39,9 +39,9 @@
cl::opt<bool> DisableOutput("disable-x86-llc-output", cl::Hidden,
cl::desc("Disable the X86 asm printer, for use "
"when profiling the code generator."));
- cl::opt<bool, true> EnableX86DAGDAG("enable-x86-dag-isel", cl::Hidden,
- cl::desc("Enable DAG-to-DAG isel for X86"),
- cl::location(X86DAGIsel),
+ cl::opt<bool, true> EnableX86PatISel("enable-x86-pattern-isel", cl::Hidden,
+ cl::desc("Enable the pattern based isel for X86"),
+ cl::location(X86PatIsel),
cl::init(false));
// Register the target.
@@ -106,10 +106,10 @@
PM.add(createUnreachableBlockEliminationPass());
// Install an instruction selector.
- if (X86DAGIsel)
- PM.add(createX86ISelDag(*this));
- else
+ if (X86PatIsel)
PM.add(createX86ISelPattern(*this));
+ else
+ PM.add(createX86ISelDag(*this));
// Print the instruction selected machine code...
if (PrintMachineCode)
@@ -173,10 +173,10 @@
PM.add(createUnreachableBlockEliminationPass());
// Install an instruction selector.
- if (X86DAGIsel)
- PM.add(createX86ISelDag(TM));
- else
+ if (X86PatIsel)
PM.add(createX86ISelPattern(TM));
+ else
+ PM.add(createX86ISelDag(TM));
// FIXME: Add SSA based peephole optimizer here.
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