Changes in directory llvm/lib/Target/X86:
X86ATTAsmPrinter.cpp updated: 1.25 -> 1.26 X86AsmPrinter.cpp updated: 1.165 -> 1.166 X86ISelDAGToDAG.cpp updated: 1.51 -> 1.52 X86ISelLowering.cpp updated: 1.94 -> 1.95 X86ISelLowering.h updated: 1.30 -> 1.31 X86InstrInfo.td updated: 1.247 -> 1.248 X86IntelAsmPrinter.cpp updated: 1.18 -> 1.19 --- Log message: PIC related bug fixes. 1. Various asm printer bug. 2. Lowering bug. Now TargetGlobalAddress is wrapped in X86ISD::TGAWrapper. --- Diffs of the changes: (+45 -14) X86ATTAsmPrinter.cpp | 8 ++++---- X86AsmPrinter.cpp | 4 ++-- X86ISelDAGToDAG.cpp | 24 ++++++++++++++++++++++++ X86ISelLowering.cpp | 13 +++++++------ X86ISelLowering.h | 4 ++++ X86InstrInfo.td | 2 ++ X86IntelAsmPrinter.cpp | 4 ++-- 7 files changed, 45 insertions(+), 14 deletions(-) Index: llvm/lib/Target/X86/X86ATTAsmPrinter.cpp diff -u llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.25 llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.26 --- llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.25 Wed Feb 22 17:59:57 2006 +++ llvm/lib/Target/X86/X86ATTAsmPrinter.cpp Wed Feb 22 20:43:52 2006 @@ -134,13 +134,13 @@ } else { GVStubs.insert(Name); O << "L" << Name << "$non_lazy_ptr"; - if (TM.getRelocationModel() == Reloc::PIC) - O << "-\"L" << getFunctionNumber() << "$pb\""; } } else { O << Mang->getValueName(GV); - } - } else + } + if (!isCallOp && TM.getRelocationModel() == Reloc::PIC) + O << "-\"L" << getFunctionNumber() << "$pb\""; + } else O << Mang->getValueName(MO.getGlobal()); int Offset = MO.getOffset(); if (Offset > 0) Index: llvm/lib/Target/X86/X86AsmPrinter.cpp diff -u llvm/lib/Target/X86/X86AsmPrinter.cpp:1.165 llvm/lib/Target/X86/X86AsmPrinter.cpp:1.166 --- llvm/lib/Target/X86/X86AsmPrinter.cpp:1.165 Tue Feb 14 19:56:23 2006 +++ llvm/lib/Target/X86/X86AsmPrinter.cpp Wed Feb 22 20:43:52 2006 @@ -100,7 +100,7 @@ (forDarwin && I->hasExternalLinkage() && !I->hasSection()))) { if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it. if (I->hasExternalLinkage()) { - O << "\t.global\t" << name << "\n"; + O << "\t.globl\t" << name << "\n"; O << "\t.zerofill __DATA__, __common, " << name << ", " << Size << ", " << Align; } else { @@ -119,8 +119,8 @@ if (COMMDirectiveTakesAlignment) O << "," << (AlignmentIsInBytes ? (1 << Align) : Align); } - O << "\t\t" << CommentString << " " << I->getName() << "\n"; } + O << "\t\t" << CommentString << " " << I->getName() << "\n"; } else { switch (I->getLinkage()) { case GlobalValue::LinkOnceLinkage: Index: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp diff -u llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.51 llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.52 --- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1.51 Wed Feb 22 18:13:58 2006 +++ llvm/lib/Target/X86/X86ISelDAGToDAG.cpp Wed Feb 22 20:43:52 2006 @@ -314,6 +314,13 @@ } break; + case X86ISD::TGAWrapper: + if (AM.GV == 0) { + AM.GV = cast<GlobalAddressSDNode>(N.getOperand(0))->getGlobal(); + return false; + } + break; + case ISD::Constant: AM.Disp += cast<ConstantSDNode>(N)->getValue(); return false; @@ -486,6 +493,16 @@ // addl $8, %ecx // use // leal 8(%eax), %ecx. + // FIXME: If the other uses ended up being scheduled ahead of the leal + // then it would have been better to use the addl. The proper way to + // handle this is with using X86InstrInfo::convertToThreeAddress hook. + // From an email: + // BTW, this problem is the one that inspired the + // "X86InstrInfo::convertToThreeAddress" hook (which would handle this + // the "right" way). Unfortunately the X86 implementation of this is + // disabled, because we don't currently have enough information handy to + // know that the flags from the add is dead when the hook is called (from + // the register allocator). if (AM.Base.Reg.Val->use_size() > 1) Complexity++; if (Complexity <= 1) @@ -557,6 +574,13 @@ switch (Opcode) { default: break; + case X86ISD::TGAWrapper: { + GlobalValue *GV = cast<GlobalAddressSDNode>(N.getOperand(0))->getGlobal(); + SDOperand TGA = CurDAG->getTargetGlobalAddress(GV, MVT::i32); + Result = CodeGenMap[N] = + SDOperand(CurDAG->getTargetNode(X86::MOV32ri, MVT::i32, TGA), 0); + return; + } case ISD::MULHU: case ISD::MULHS: { if (Opcode == ISD::MULHU) Index: llvm/lib/Target/X86/X86ISelLowering.cpp diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.94 llvm/lib/Target/X86/X86ISelLowering.cpp:1.95 --- llvm/lib/Target/X86/X86ISelLowering.cpp:1.94 Wed Feb 22 14:19:42 2006 +++ llvm/lib/Target/X86/X86ISelLowering.cpp Wed Feb 22 20:43:52 2006 @@ -1833,8 +1833,7 @@ SDOperand Result = DAG.getTargetConstantPool(CP->get(), getPointerTy(), CP->getAlignment()); // Only lower ConstantPool on Darwin. - if (getTargetMachine(). - getSubtarget<X86Subtarget>().isTargetDarwin()) { + if (getTargetMachine().getSubtarget<X86Subtarget>().isTargetDarwin()) { // With PIC, the address is actually $g + Offset. if (getTargetMachine().getRelocationModel() == Reloc::PIC) Result = DAG.getNode(ISD::ADD, getPointerTy(), @@ -1849,11 +1848,12 @@ if (getTargetMachine(). getSubtarget<X86Subtarget>().isTargetDarwin()) { GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal(); - SDOperand Addr = DAG.getTargetGlobalAddress(GV, getPointerTy()); + Result = DAG.getNode(X86ISD::TGAWrapper, getPointerTy(), + DAG.getTargetGlobalAddress(GV, getPointerTy())); // With PIC, the address is actually $g + Offset. if (getTargetMachine().getRelocationModel() == Reloc::PIC) - Addr = DAG.getNode(ISD::ADD, getPointerTy(), - DAG.getNode(X86ISD::GlobalBaseReg, getPointerTy()), Addr); + Result = DAG.getNode(ISD::ADD, getPointerTy(), + DAG.getNode(X86ISD::GlobalBaseReg, getPointerTy()), Result); // For Darwin, external and weak symbols are indirect, so we want to load // the value at address GV, not the value of GV itself. This means that @@ -1863,7 +1863,7 @@ (GV->hasWeakLinkage() || GV->hasLinkOnceLinkage() || (GV->isExternal() && !GV->hasNotBeenReadFromBytecode()))) Result = DAG.getLoad(MVT::i32, DAG.getEntryNode(), - Addr, DAG.getSrcValue(NULL)); + Result, DAG.getSrcValue(NULL)); } return Result; @@ -1977,6 +1977,7 @@ case X86ISD::REP_MOVS: return "X86ISD::RET_MOVS"; case X86ISD::LOAD_PACK: return "X86ISD::LOAD_PACK"; case X86ISD::GlobalBaseReg: return "X86ISD::GlobalBaseReg"; + case X86ISD::TGAWrapper: return "X86ISD::TGAWrapper"; } } Index: llvm/lib/Target/X86/X86ISelLowering.h diff -u llvm/lib/Target/X86/X86ISelLowering.h:1.30 llvm/lib/Target/X86/X86ISelLowering.h:1.31 --- llvm/lib/Target/X86/X86ISelLowering.h:1.30 Tue Feb 21 18:56:39 2006 +++ llvm/lib/Target/X86/X86ISelLowering.h Wed Feb 22 20:43:52 2006 @@ -141,6 +141,10 @@ /// GlobalBaseReg - On Darwin, this node represents the result of the popl /// at function entry, used for PIC code. GlobalBaseReg, + + /// TGAWrapper - A wrapper node for TargetGlobalAddress, only used on + /// Darwin. + TGAWrapper, }; // X86 specific condition code. These correspond to X86_*_COND in Index: llvm/lib/Target/X86/X86InstrInfo.td diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.247 llvm/lib/Target/X86/X86InstrInfo.td:1.248 --- llvm/lib/Target/X86/X86InstrInfo.td:1.247 Tue Feb 21 20:26:30 2006 +++ llvm/lib/Target/X86/X86InstrInfo.td Wed Feb 22 20:43:52 2006 @@ -120,6 +120,8 @@ def X86loadp : SDNode<"X86ISD::LOAD_PACK", SDTLoad, [SDNPHasChain]>; +def X86TGAWrapper : SDNode<"X86ISD::TGAWrapper", SDTIntUnaryOp>; + //===----------------------------------------------------------------------===// // X86 Operand Definitions. // Index: llvm/lib/Target/X86/X86IntelAsmPrinter.cpp diff -u llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.18 llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.19 --- llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.18 Wed Feb 22 14:19:42 2006 +++ llvm/lib/Target/X86/X86IntelAsmPrinter.cpp Wed Feb 22 20:43:52 2006 @@ -128,12 +128,12 @@ } else { GVStubs.insert(Name); O << "L" << Name << "$non_lazy_ptr"; - if (TM.getRelocationModel() == Reloc::PIC) - O << "-\"L" << getFunctionNumber() << "$pb\""; } } else { O << Mang->getValueName(GV); } + if (!isCallOp && TM.getRelocationModel() == Reloc::PIC) + O << "-\"L" << getFunctionNumber() << "$pb\""; } else O << Mang->getValueName(MO.getGlobal()); int Offset = MO.getOffset(); _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits