Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.cpp updated: 1.17 -> 1.18 PPCInstrInfo.td updated: 1.183 -> 1.184 PPCRegisterInfo.cpp updated: 1.44 -> 1.45 --- Log message: Add support for copying registers. still needed: spilling and reloading them --- Diffs of the changes: (+7 -1) PPCInstrInfo.cpp | 2 +- PPCInstrInfo.td | 4 ++++ PPCRegisterInfo.cpp | 2 ++ 3 files changed, 7 insertions(+), 1 deletion(-) Index: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:1.17 llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:1.18 --- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:1.17 Sun Mar 5 17:49:55 2006 +++ llvm/lib/Target/PowerPC/PPCInstrInfo.cpp Thu Mar 16 14:03:58 2006 @@ -25,7 +25,7 @@ unsigned& sourceReg, unsigned& destReg) const { MachineOpCode oc = MI.getOpcode(); - if (oc == PPC::OR4 || oc == PPC::OR8 || + if (oc == PPC::OR4 || oc == PPC::OR8 || oc == PPC::VOR || oc == PPC::OR4To8 || oc == PPC::OR8To4) { // or r1, r2, r2 assert(MI.getNumOperands() == 3 && MI.getOperand(0).isRegister() && Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.183 llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.184 --- llvm/lib/Target/PowerPC/PPCInstrInfo.td:1.183 Tue Mar 14 23:25:05 2006 +++ llvm/lib/Target/PowerPC/PPCInstrInfo.td Thu Mar 16 14:03:58 2006 @@ -1009,6 +1009,9 @@ def VSUBFP : VXForm_1<74, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB), "vsubfp $vD, $vA, $vB", VecFP, [(set VRRC:$vD, (fsub VRRC:$vA, VRRC:$vB))]>; +def VOR : VXForm_1<1156, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB), + "vor $vD, $vA, $vB", VecFP, + []>; def VXOR : VXForm_1<1220, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB), "vxor $vD, $vA, $vB", VecFP, []>; @@ -1151,6 +1154,7 @@ def : Pat<(store (v4i32 VRRC:$rS), xoaddr:$dst), (STVX (v4i32 VRRC:$rS), xoaddr:$dst)>; + // Same as above, but using a temporary. FIXME: implement temporaries :) /* def : Pattern<(xor GPRC:$in, imm:$imm), Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.44 llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.45 --- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.44 Mon Mar 13 15:52:10 2006 +++ llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp Thu Mar 16 14:03:58 2006 @@ -110,6 +110,8 @@ BuildMI(MBB, MI, PPC::FMRD, 1, DestReg).addReg(SrcReg); } else if (RC == PPC::CRRCRegisterClass) { BuildMI(MBB, MI, PPC::MCRF, 1, DestReg).addReg(SrcReg); + } else if (RC == PPC::VRRCRegisterClass) { + BuildMI(MBB, MI, PPC::VOR, 2, DestReg).addReg(SrcReg).addReg(SrcReg); } else { std::cerr << "Attempt to copy register that is not GPR or FPR"; abort(); _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits