Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.19 -> 1.20 ARMInstrInfo.td updated: 1.11 -> 1.12 --- Log message: add and use ARMISD::RET_FLAG --- Diffs of the changes: (+10 -9) ARMISelDAGToDAG.cpp | 15 +++++++-------- ARMInstrInfo.td | 4 +++- 2 files changed, 10 insertions(+), 9 deletions(-) Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.19 llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.20 --- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.19 Tue Aug 1 07:58:43 2006 +++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Thu Aug 3 12:02:20 2006 @@ -52,7 +52,10 @@ // Start the numbering where the builting ops and target ops leave off. FIRST_NUMBER = ISD::BUILTIN_OP_END+ARM::INSTRUCTION_LIST_END, /// CALL - A direct function call. - CALL + CALL, + + /// Return with a flag operand. + RET_FLAG }; } } @@ -61,6 +64,7 @@ switch (Opcode) { default: return 0; case ARMISD::CALL: return "ARMISD::CALL"; + case ARMISD::RET_FLAG: return "ARMISD::RET_FLAG"; } } @@ -175,13 +179,8 @@ break; } - SDOperand LR = DAG.getRegister(ARM::R14, MVT::i32); - - //bug: the copy and branch should be linked with a flag so that the - //scheduller can't move an instruction that destroys R0 in between them - //return DAG.getNode(ISD::BRIND, MVT::Other, Copy, LR, Copy.getValue(1)); - - return DAG.getNode(ISD::BRIND, MVT::Other, Copy, LR); + //We must use RET_FLAG instead of BRIND because BRIND doesn't have a flag + return DAG.getNode(ARMISD::RET_FLAG, MVT::Other, Copy, Copy.getValue(1)); } static SDOperand LowerFORMAL_ARGUMENT(SDOperand Op, SelectionDAG &DAG, Index: llvm/lib/Target/ARM/ARMInstrInfo.td diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.11 llvm/lib/Target/ARM/ARMInstrInfo.td:1.12 --- llvm/lib/Target/ARM/ARMInstrInfo.td:1.11 Tue Aug 1 13:53:10 2006 +++ llvm/lib/Target/ARM/ARMInstrInfo.td Thu Aug 3 12:02:20 2006 @@ -44,6 +44,8 @@ def SDT_ARMcall : SDTypeProfile<0, -1, [SDTCisInt<0>]>; def ARMcall : SDNode<"ARMISD::CALL", SDT_ARMcall, [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; +def retflag : SDNode<"ARMISD::RET_FLAG", SDTRet, + [SDNPHasChain, SDNPOptInFlag]>; def ADJCALLSTACKUP : InstARM<(ops i32imm:$amt), "!ADJCALLSTACKUP $amt", @@ -54,7 +56,7 @@ [(callseq_start imm:$amt)]>; let isReturn = 1 in { - def bx: InstARM<(ops IntRegs:$dst), "bx $dst", [(brind IntRegs:$dst)]>; + def bx: InstARM<(ops), "bx r14", [(retflag)]>; } let Defs = [R0, R1, R2, R3] in { _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits