Changes in directory llvm/lib/Target/X86:
X86Subtarget.cpp updated: 1.32 -> 1.33 --- Log message: It appears the inline asm in GetCpuIDAndInfo() may clobbers some registers if it isn't inlined (at < -O3). Force it to be inlined. --- Diffs of the changes: (+3 -3) X86Subtarget.cpp | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) Index: llvm/lib/Target/X86/X86Subtarget.cpp diff -u llvm/lib/Target/X86/X86Subtarget.cpp:1.32 llvm/lib/Target/X86/X86Subtarget.cpp:1.33 --- llvm/lib/Target/X86/X86Subtarget.cpp:1.32 Wed Oct 4 13:33:00 2006 +++ llvm/lib/Target/X86/X86Subtarget.cpp Fri Oct 6 02:50:56 2006 @@ -28,7 +28,7 @@ /// GetCpuIDAndInfo - Execute the specified cpuid and return the 4 values in the /// specified arguments. If we can't run cpuid on the host, return true. -static bool GetCpuIDAndInfo(unsigned value, unsigned *rEAX, unsigned *rEBX, +static inline bool GetCpuIDAndInfo(unsigned value, unsigned *rEAX, unsigned *rEBX, unsigned *rECX, unsigned *rEDX) { #if defined(__x86_64__) asm ("pushq\t%%rbx\n\t" @@ -76,8 +76,8 @@ unsigned EAX = 0, EBX = 0, ECX = 0, EDX = 0; if (GetCpuIDAndInfo(0x1, &EAX, &EBX, &ECX, &EDX)) return "generic"; - unsigned Family = (EAX & (0xffffffff >> (32 - 4)) << 8) >> 8; // Bits 8 - 11 - unsigned Model = (EAX & (0xffffffff >> (32 - 4)) << 4) >> 4; // Bits 4 - 7 + unsigned Family = (EAX >> 8) & 0xf; // Bits 8 - 11 + unsigned Model = (EAX >> 4) & 0xf; // Bits 4 - 7 GetCpuIDAndInfo(0x80000001, &EAX, &EBX, &ECX, &EDX); bool Em64T = EDX & (1 << 29); _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits