Changes in directory llvm/lib/Target/Sparc:
SparcInstrInfo.cpp updated: 1.15 -> 1.16 SparcRegisterInfo.cpp updated: 1.45 -> 1.46 SparcRegisterInfo.h updated: 1.13 -> 1.14 --- Log message: Matches MachineInstr changes. --- Diffs of the changes: (+10 -8) SparcInstrInfo.cpp | 2 +- SparcRegisterInfo.cpp | 13 +++++++------ SparcRegisterInfo.h | 3 ++- 3 files changed, 10 insertions(+), 8 deletions(-) Index: llvm/lib/Target/Sparc/SparcInstrInfo.cpp diff -u llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.15 llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.16 --- llvm/lib/Target/Sparc/SparcInstrInfo.cpp:1.15 Tue Oct 24 12:07:11 2006 +++ llvm/lib/Target/Sparc/SparcInstrInfo.cpp Mon Nov 13 17:36:35 2006 @@ -19,7 +19,7 @@ SparcInstrInfo::SparcInstrInfo(SparcSubtarget &ST) : TargetInstrInfo(SparcInsts, sizeof(SparcInsts)/sizeof(SparcInsts[0])), - RI(ST) { + RI(ST, *this) { } static bool isZeroImm(const MachineOperand &op) { Index: llvm/lib/Target/Sparc/SparcRegisterInfo.cpp diff -u llvm/lib/Target/Sparc/SparcRegisterInfo.cpp:1.45 llvm/lib/Target/Sparc/SparcRegisterInfo.cpp:1.46 --- llvm/lib/Target/Sparc/SparcRegisterInfo.cpp:1.45 Mon Sep 4 21:31:13 2006 +++ llvm/lib/Target/Sparc/SparcRegisterInfo.cpp Mon Nov 13 17:36:35 2006 @@ -23,9 +23,10 @@ #include <iostream> using namespace llvm; -SparcRegisterInfo::SparcRegisterInfo(SparcSubtarget &st) +SparcRegisterInfo::SparcRegisterInfo(SparcSubtarget &st, + const TargetInstrInfo &tii) : SparcGenRegisterInfo(SP::ADJCALLSTACKDOWN, SP::ADJCALLSTACKUP), - Subtarget(st) { + Subtarget(st), TII(tii) { } void SparcRegisterInfo:: @@ -81,10 +82,10 @@ if (MI->getOperand(1).isRegister() && MI->getOperand(1).getReg() == SP::G0&& MI->getOperand(0).isRegister() && MI->getOperand(2).isRegister()) { if (OpNum == 0) // COPY -> STORE - return BuildMI(SP::STri, 3).addFrameIndex(FI).addImm(0) + return BuildMI(TII, SP::STri, 3).addFrameIndex(FI).addImm(0) .addReg(MI->getOperand(2).getReg()); else // COPY -> LOAD - return BuildMI(SP::LDri, 2, MI->getOperand(0).getReg()) + return BuildMI(TII, SP::LDri, 2, MI->getOperand(0).getReg()) .addFrameIndex(FI).addImm(0); } break; @@ -93,10 +94,10 @@ // FALLTHROUGH case SP::FMOVD: if (OpNum == 0) // COPY -> STORE - return BuildMI(isFloat ? SP::STFri : SP::STDFri, 3) + return BuildMI(TII, isFloat ? SP::STFri : SP::STDFri, 3) .addFrameIndex(FI).addImm(0).addReg(MI->getOperand(1).getReg()); else // COPY -> LOAD - return BuildMI(isFloat ? SP::LDFri : SP::LDDFri, 2, + return BuildMI(TII, isFloat ? SP::LDFri : SP::LDDFri, 2, MI->getOperand(0).getReg()).addFrameIndex(FI).addImm(0); break; } Index: llvm/lib/Target/Sparc/SparcRegisterInfo.h diff -u llvm/lib/Target/Sparc/SparcRegisterInfo.h:1.13 llvm/lib/Target/Sparc/SparcRegisterInfo.h:1.14 --- llvm/lib/Target/Sparc/SparcRegisterInfo.h:1.13 Wed May 17 19:12:45 2006 +++ llvm/lib/Target/Sparc/SparcRegisterInfo.h Mon Nov 13 17:36:35 2006 @@ -24,8 +24,9 @@ struct SparcRegisterInfo : public SparcGenRegisterInfo { SparcSubtarget &Subtarget; + const TargetInstrInfo &TII; - SparcRegisterInfo(SparcSubtarget &st); + SparcRegisterInfo(SparcSubtarget &st, const TargetInstrInfo &tii); /// Code Generation virtual methods... void storeRegToStackSlot(MachineBasicBlock &MBB, _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits