Changes in directory llvm/lib/Target/PowerPC:
PPCHazardRecognizers.cpp updated: 1.16 -> 1.17 PPCInstr64Bit.td updated: 1.29 -> 1.30 --- Log message: add ppc64 r+i stores with update. --- Diffs of the changes: (+72 -40) PPCHazardRecognizers.cpp | 27 +++++++------- PPCInstr64Bit.td | 85 ++++++++++++++++++++++++++++++++--------------- 2 files changed, 72 insertions(+), 40 deletions(-) Index: llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp diff -u llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp:1.16 llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp:1.17 --- llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp:1.16 Tue Nov 14 20:43:19 2006 +++ llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp Wed Nov 15 18:57:19 2006 @@ -234,28 +234,26 @@ unsigned ThisStoreSize; switch (Opcode) { default: assert(0 && "Unknown store instruction!"); - case PPC::STB: case PPC::STBU: - case PPC::STBX: - case PPC::STB8: - case PPC::STBX8: + case PPC::STB: case PPC::STB8: + case PPC::STBU: case PPC::STBU8: + case PPC::STBX: case PPC::STBX8: case PPC::STVEBX: ThisStoreSize = 1; break; - case PPC::STH: case PPC::STHU: - case PPC::STHX: - case PPC::STH8: - case PPC::STHX8: + case PPC::STH: case PPC::STH8: + case PPC::STHU: case PPC::STHU8: + case PPC::STHX: case PPC::STHX8: case PPC::STVEHX: case PPC::STHBRX: ThisStoreSize = 2; break; - case PPC::STFS: case PPC::STFSU: + case PPC::STFS: + case PPC::STFSU: case PPC::STFSX: - case PPC::STWX: + case PPC::STWX: case PPC::STWX8: case PPC::STWUX: - case PPC::STW: case PPC::STWU: - case PPC::STW8: - case PPC::STWX8: + case PPC::STW: case PPC::STW8: + case PPC::STWU: case PPC::STWU8: case PPC::STVEWX: case PPC::STFIWX: case PPC::STWBRX: @@ -263,7 +261,8 @@ break; case PPC::STD_32: case PPC::STDX_32: - case PPC::STD: case PPC::STDU: + case PPC::STD: + case PPC::STDU: case PPC::STFD: case PPC::STFDX: case PPC::STDX: Index: llvm/lib/Target/PowerPC/PPCInstr64Bit.td diff -u llvm/lib/Target/PowerPC/PPCInstr64Bit.td:1.29 llvm/lib/Target/PowerPC/PPCInstr64Bit.td:1.30 --- llvm/lib/Target/PowerPC/PPCInstr64Bit.td:1.29 Wed Nov 15 17:24:18 2006 +++ llvm/lib/Target/PowerPC/PPCInstr64Bit.td Wed Nov 15 18:57:19 2006 @@ -356,32 +356,6 @@ } let isStore = 1, noResults = 1, PPC970_Unit = 2 in { -// Normal stores. -def STD : DSForm_1<62, 0, (ops G8RC:$rS, memrix:$dst), - "std $rS, $dst", LdStSTD, - [(store G8RC:$rS, ixaddr:$dst)]>, isPPC64; -def STDX : XForm_8<31, 149, (ops G8RC:$rS, memrr:$dst), - "stdx $rS, $dst", LdStSTD, - [(store G8RC:$rS, xaddr:$dst)]>, isPPC64, - PPC970_DGroup_Cracked; - -def STDU : DSForm_1<62, 1, (ops G8RC:$ea_res, G8RC:$rS, memrix:$dst), - "stdu $rS, $dst", LdStSTD, - []>, isPPC64; -def STDUX : XForm_8<31, 181, (ops G8RC:$rS, memrr:$dst), - "stdux $rS, $dst", LdStSTD, - []>, isPPC64; - -// STD_32/STDX_32 - Just like STD/STDX, but uses a '32-bit' input register. -def STD_32 : DSForm_1<62, 0, (ops GPRC:$rT, memrix:$dst), - "std $rT, $dst", LdStSTD, - [(PPCstd_32 GPRC:$rT, ixaddr:$dst)]>, isPPC64; -def STDX_32 : XForm_8<31, 149, (ops GPRC:$rT, memrr:$dst), - "stdx $rT, $dst", LdStSTD, - [(PPCstd_32 GPRC:$rT, xaddr:$dst)]>, isPPC64, - PPC970_DGroup_Cracked; - - // Truncating stores. def STB8 : DForm_1<38, (ops G8RC:$rS, memri:$src), "stb $rS, $src", LdStGeneral, @@ -404,6 +378,65 @@ "stwx $rS, $dst", LdStGeneral, [(truncstorei32 G8RC:$rS, xaddr:$dst)]>, PPC970_DGroup_Cracked; +// Normal 8-byte stores. +def STD : DSForm_1<62, 0, (ops G8RC:$rS, memrix:$dst), + "std $rS, $dst", LdStSTD, + [(store G8RC:$rS, ixaddr:$dst)]>, isPPC64; +def STDX : XForm_8<31, 149, (ops G8RC:$rS, memrr:$dst), + "stdx $rS, $dst", LdStSTD, + [(store G8RC:$rS, xaddr:$dst)]>, isPPC64, + PPC970_DGroup_Cracked; +} + +let isStore = 1, PPC970_Unit = 2 in { + +def STBU8 : DForm_1<38, (ops ptr_rc:$ea_res, G8RC:$rS, + symbolLo:$ptroff, ptr_rc:$ptrreg), + "stbu $rS, $ptroff($ptrreg)", LdStGeneral, + [(set ptr_rc:$ea_res, + (pre_truncsti8 G8RC:$rS, ptr_rc:$ptrreg, + iaddroff:$ptroff))]>, + RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">; +def STHU8 : DForm_1<45, (ops ptr_rc:$ea_res, G8RC:$rS, + symbolLo:$ptroff, ptr_rc:$ptrreg), + "sthu $rS, $ptroff($ptrreg)", LdStGeneral, + [(set ptr_rc:$ea_res, + (pre_truncsti16 G8RC:$rS, ptr_rc:$ptrreg, + iaddroff:$ptroff))]>, + RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">; +def STWU8 : DForm_1<37, (ops ptr_rc:$ea_res, G8RC:$rS, + symbolLo:$ptroff, ptr_rc:$ptrreg), + "stwu $rS, $ptroff($ptrreg)", LdStGeneral, + [(set ptr_rc:$ea_res, (pre_store G8RC:$rS, ptr_rc:$ptrreg, + iaddroff:$ptroff))]>, + RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">; + + +def STDU : DSForm_1<62, 1, (ops ptr_rc:$ea_res, G8RC:$rS, + symbolLo:$ptroff, ptr_rc:$ptrreg), + "stdu $rS, $ptroff($ptrreg)", LdStSTD, + [(set ptr_rc:$ea_res, (pre_store G8RC:$rS, ptr_rc:$ptrreg, + iaddroff:$ptroff))]>, + RegConstraint<"$ptrreg = $ea_res">, NoEncode<"$ea_res">, + isPPC64; + +} + +let isStore = 1, noResults = 1, PPC970_Unit = 2 in { + +def STDUX : XForm_8<31, 181, (ops G8RC:$rS, memrr:$dst), + "stdux $rS, $dst", LdStSTD, + []>, isPPC64; + + +// STD_32/STDX_32 - Just like STD/STDX, but uses a '32-bit' input register. +def STD_32 : DSForm_1<62, 0, (ops GPRC:$rT, memrix:$dst), + "std $rT, $dst", LdStSTD, + [(PPCstd_32 GPRC:$rT, ixaddr:$dst)]>, isPPC64; +def STDX_32 : XForm_8<31, 149, (ops GPRC:$rT, memrr:$dst), + "stdx $rT, $dst", LdStSTD, + [(PPCstd_32 GPRC:$rT, xaddr:$dst)]>, isPPC64, + PPC970_DGroup_Cracked; } _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits