Changes in directory llvm/lib/Target/PowerPC:
PPCRegisterInfo.td updated: 1.43 -> 1.44
---
Log message:
We'd still like to register allocate r2 on darwin before the callee-save
regs.
---
Diffs of the changes: (+6 -6)
PPCRegisterInfo.td | 12 ++++++------
1 files changed, 6 insertions(+), 6 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.td
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.td:1.43
llvm/lib/Target/PowerPC/PPCRegisterInfo.td:1.44
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.td:1.43 Thu Dec 21 14:26:09 2006
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.td Mon Jan 29 16:57:48 2007
@@ -209,9 +209,9 @@
// Allocate volatiles first
// then nonvolatiles in reverse order since stmw/lmw save from rN to r31
def GPRC : RegisterClass<"PPC", [i32], 32,
- [R3, R4, R5, R6, R7, R8, R9, R10, R11, R12,
+ [R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12,
R30, R29, R28, R27, R26, R25, R24, R23, R22, R21, R20, R19, R18, R17,
- R16, R15, R14, R2, R13, R31, R0, R1, LR]>
+ R16, R15, R14, R13, R31, R0, R1, LR]>
{
let MethodProtos = [{
iterator allocation_order_begin(const MachineFunction &MF) const;
@@ -220,14 +220,14 @@
let MethodBodies = [{
GPRCClass::iterator
GPRCClass::allocation_order_begin(const MachineFunction &MF) const {
+ // In Linux, r2 is reserved for the OS.
+ if (!MF.getTarget().getSubtarget<PPCSubtarget>().isDarwin())
+ return begin()+1;
+
return begin();
}
GPRCClass::iterator
GPRCClass::allocation_order_end(const MachineFunction &MF) const {
- // In Linux, r2 is reserved for the OS.
- if (!MF.getTarget().getSubtarget<PPCSubtarget>().isDarwin())
- return end()-6;
-
// On PPC64, r13 is the thread pointer. Never allocate this register.
// Note that this is overconservative, as it also prevents allocation of
// R31 when the FP is not needed.
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