Changes in directory llvm/include/llvm/Target:
MRegisterInfo.h updated: 1.93 -> 1.94 --- Log message: Re-apply my liveintervalanalysis changes. Now with PR1207: http://llvm.org/PR1207 fixes. --- Diffs of the changes: (+17 -0) MRegisterInfo.h | 17 +++++++++++++++++ 1 files changed, 17 insertions(+) Index: llvm/include/llvm/Target/MRegisterInfo.h diff -u llvm/include/llvm/Target/MRegisterInfo.h:1.93 llvm/include/llvm/Target/MRegisterInfo.h:1.94 --- llvm/include/llvm/Target/MRegisterInfo.h:1.93 Sun Feb 18 21:20:00 2007 +++ llvm/include/llvm/Target/MRegisterInfo.h Mon Feb 19 15:49:53 2007 @@ -284,6 +284,17 @@ return false; } + /// regsOverlap - Returns true if the two registers are equal or alias + /// each other. The registers may be virtual register. + bool regsOverlap(unsigned regA, unsigned regB) const { + if (regA == regB) + return true; + + if (isVirtualRegister(regA) || isVirtualRegister(regB)) + return false; + return areAliases(regA, regB); + } + /// getCalleeSavedRegs - Return a null-terminated list of all of the /// callee saved registers on this target. The register should be in the /// order of desired callee-save stack frame offset. The first register is @@ -295,6 +306,12 @@ /// length of this list match the getCalleeSaveRegs() list. virtual const TargetRegisterClass* const *getCalleeSavedRegClasses() const =0; + /// getReservedRegs - Returns a bitset indexed by physical register number + /// indicating if a register is a special register that has particular uses and + /// should be considered unavailable at all times, e.g. SP, RA. This is used by + /// register scavenger to determine what registers are free. + virtual BitVector getReservedRegs(const MachineFunction &MF) const = 0; + //===--------------------------------------------------------------------===// // Register Class Information // _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
