Changes in directory llvm/lib/Target/ARM:
ARMISelLowering.h updated: 1.5 -> 1.6
ARMISelLowering.cpp updated: 1.27 -> 1.28
---
Log message:
do not share old induction variables when this would result in invalid
instructions (that would have to be split later)
---
Diffs of the changes: (+29 -0)
ARMISelLowering.cpp | 18 ++++++++++++++++++
ARMISelLowering.h | 11 +++++++++++
2 files changed, 29 insertions(+)
Index: llvm/lib/Target/ARM/ARMISelLowering.h
diff -u llvm/lib/Target/ARM/ARMISelLowering.h:1.5
llvm/lib/Target/ARM/ARMISelLowering.h:1.6
--- llvm/lib/Target/ARM/ARMISelLowering.h:1.5 Mon Mar 19 19:30:56 2007
+++ llvm/lib/Target/ARM/ARMISelLowering.h Tue Mar 20 16:54:54 2007
@@ -100,6 +100,17 @@
/// type.
virtual bool isLegalAddressScale(int64_t S, const Type *Ty) const;
+ /// isLegalAddressScaleAndImm - Return true if S works for
+ /// IsLegalAddressScale and V works for isLegalAddressImmediate _and_
+ /// both can be applied simultaneously to the same instruction.
+ virtual bool isLegalAddressScaleAndImm(int64_t S, int64_t V,
+ const Type *Ty) const;
+
+ /// isLegalAddressScaleAndImm - Return true if S works for
+ /// IsLegalAddressScale and GV works for isLegalAddressImmediate _and_
+ /// both can be applied simultaneously to the same instruction.
+ virtual bool isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV) const;
+
/// getPreIndexedAddressParts - returns true by value, base pointer and
/// offset pointer and addressing mode by reference if the node's address
/// can be legally represented as pre-indexed load / store address.
Index: llvm/lib/Target/ARM/ARMISelLowering.cpp
diff -u llvm/lib/Target/ARM/ARMISelLowering.cpp:1.27
llvm/lib/Target/ARM/ARMISelLowering.cpp:1.28
--- llvm/lib/Target/ARM/ARMISelLowering.cpp:1.27 Tue Mar 20 12:57:23 2007
+++ llvm/lib/Target/ARM/ARMISelLowering.cpp Tue Mar 20 16:54:54 2007
@@ -1379,6 +1379,24 @@
}
}
+/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
+/// and V works for isLegalAddressImmediate _and_ both can be applied
+/// simultaneously to the same instruction.
+bool ARMTargetLowering::isLegalAddressScaleAndImm(int64_t S, int64_t V,
+ const Type* Ty) const {
+ if (V == 0)
+ return isLegalAddressScale(S, Ty);
+ return false;
+}
+
+/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
+/// and GV works for isLegalAddressImmediate _and_ both can be applied
+/// simultaneously to the same instruction.
+bool ARMTargetLowering::isLegalAddressScaleAndImm(int64_t S,
+ GlobalValue *GV) const {
+ return false;
+}
+
static bool getIndexedAddressParts(SDNode *Ptr, MVT::ValueType VT,
bool isSEXTLoad, SDOperand &Base,
SDOperand &Offset, bool &isInc,
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