Changes in directory llvm/lib/Target/X86:
X86ISelLowering.h updated: 1.92 -> 1.93
X86ISelLowering.cpp updated: 1.373 -> 1.374
---
Log message:
repair x86 performance, dejagnu problems from previous change
---
Diffs of the changes: (+28 -0)
X86ISelLowering.cpp | 16 ++++++++++++++++
X86ISelLowering.h | 12 ++++++++++++
2 files changed, 28 insertions(+)
Index: llvm/lib/Target/X86/X86ISelLowering.h
diff -u llvm/lib/Target/X86/X86ISelLowering.h:1.92
llvm/lib/Target/X86/X86ISelLowering.h:1.93
--- llvm/lib/Target/X86/X86ISelLowering.h:1.92 Mon Mar 12 18:28:50 2007
+++ llvm/lib/Target/X86/X86ISelLowering.h Wed Mar 21 16:51:52 2007
@@ -349,6 +349,18 @@
/// type.
virtual bool isLegalAddressScale(int64_t S, const Type *Ty) const;
+ /// isLegalAddressScaleAndImm - Return true if S works for
+ /// IsLegalAddressScale and V works for isLegalAddressImmediate _and_
+ /// both can be applied simultaneously to the same instruction.
+ virtual bool isLegalAddressScaleAndImm(int64_t S, int64_t V,
+ const Type *Ty) const;
+
+ /// isLegalAddressScaleAndImm - Return true if S works for
+ /// IsLegalAddressScale and GV works for isLegalAddressImmediate _and_
+ /// both can be applied simultaneously to the same instruction.
+ virtual bool isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
+ const Type *Ty) const;
+
/// isShuffleMaskLegal - Targets can use this to indicate that they only
/// support *some* VECTOR_SHUFFLE operations, those with specific masks.
/// By default, if a target supports the VECTOR_SHUFFLE node, all mask
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.373
llvm/lib/Target/X86/X86ISelLowering.cpp:1.374
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.373 Sun Mar 18 19:39:32 2007
+++ llvm/lib/Target/X86/X86ISelLowering.cpp Wed Mar 21 16:51:52 2007
@@ -4064,6 +4064,22 @@
}
}
+/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
+/// and V works for isLegalAddressImmediate _and_ both can be applied
+/// simultaneously to the same instruction.
+bool X86TargetLowering::isLegalAddressScaleAndImm(int64_t S, int64_t V,
+ const Type* Ty) const {
+ return isLegalAddressScale(S, Ty) && isLegalAddressImmediate(V, Ty);
+}
+
+/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
+/// and GV works for isLegalAddressImmediate _and_ both can be applied
+/// simultaneously to the same instruction.
+bool X86TargetLowering::isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
+ const Type* Ty) const {
+ return isLegalAddressScale(S, Ty) && isLegalAddressImmediate(GV);
+}
+
/// isShuffleMaskLegal - Targets can use this to indicate that they only
/// support *some* VECTOR_SHUFFLE operations, those with specific masks.
/// By default, if a target supports the VECTOR_SHUFFLE node, all mask values
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