Changes in directory llvm/lib/CodeGen:
IfConversion.cpp updated: 1.52 -> 1.53 MachineInstr.cpp updated: 1.151 -> 1.152 --- Log message: MachineInstr::isPredicable() is no longer needed. --- Diffs of the changes: (+5 -10) IfConversion.cpp | 11 +++++------ MachineInstr.cpp | 4 ---- 2 files changed, 5 insertions(+), 10 deletions(-) Index: llvm/lib/CodeGen/IfConversion.cpp diff -u llvm/lib/CodeGen/IfConversion.cpp:1.52 llvm/lib/CodeGen/IfConversion.cpp:1.53 --- llvm/lib/CodeGen/IfConversion.cpp:1.52 Fri Jun 15 12:34:48 2007 +++ llvm/lib/CodeGen/IfConversion.cpp Fri Jun 15 14:06:07 2007 @@ -447,7 +447,7 @@ if (TID->Flags & M_CLOBBERS_PRED) BBI.ClobbersPred = true; - if (!I->isPredicable()) { + if ((TID->Flags & M_PREDICABLE) == 0) { BBI.IsUnpredicable = true; return; } @@ -881,7 +881,8 @@ while (TT != BBI.TrueBB->end() && FT != BBI.FalseBB->end()) { if (TT->isIdenticalTo(FT)) Dups.push_back(TT); // Will erase these later. - else if (!TT->isPredicable() && !FT->isPredicable()) + else if ((TT->getInstrDescriptor()->Flags & M_PREDICABLE) == 0 || + (FT->getInstrDescriptor()->Flags & M_PREDICABLE) == 0) return false; // Can't if-convert. Abort! ++TT; ++FT; @@ -890,15 +891,13 @@ // One of the two pathes have more terminators, make sure they are // all predicable. while (TT != BBI.TrueBB->end()) { - if (!TT->isPredicable()) { + if ((TT->getInstrDescriptor()->Flags & M_PREDICABLE) == 0) return false; // Can't if-convert. Abort! - } ++TT; } while (FT != BBI.FalseBB->end()) { - if (!FT->isPredicable()) { + if ((FT->getInstrDescriptor()->Flags & M_PREDICABLE) == 0) return false; // Can't if-convert. Abort! - } ++FT; } } Index: llvm/lib/CodeGen/MachineInstr.cpp diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.151 llvm/lib/CodeGen/MachineInstr.cpp:1.152 --- llvm/lib/CodeGen/MachineInstr.cpp:1.151 Tue May 29 13:33:12 2007 +++ llvm/lib/CodeGen/MachineInstr.cpp Fri Jun 15 14:06:07 2007 @@ -184,10 +184,6 @@ } } -bool MachineInstr::isPredicable() const { - return TID->Flags & M_PREDICABLE; -} - /// findRegisterUseOperandIdx() - Returns the MachineOperand that is a use of /// the specific register or -1 if it is not found. It further tightening /// the search criteria to a use that kills the register if isKill is true. _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits