Author: evancheng
Date: Mon Dec 3 03:58:48 2007
New Revision: 44531
URL: http://llvm.org/viewvc/llvm-project?rev=44531&view=rev
Log:
Update kill info for uses of split intervals.
Modified:
llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
llvm/trunk/lib/CodeGen/VirtRegMap.cpp
Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=44531&r1=44530&r2=44531&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Mon Dec 3 03:58:48 2007
@@ -923,7 +923,6 @@
unsigned NewVReg = 0;
unsigned index = getBaseIndex(I->start);
unsigned end = getBaseIndex(I->end-1) + InstrSlots::NUM;
- bool TrySplitMI = TrySplit && vrm.getPreSplitReg(li.reg) == 0;
for (; index != end; index += InstrSlots::NUM) {
// skip deleted instructions
while (index != end && !getInstructionFromIndex(index))
@@ -933,7 +932,7 @@
MachineInstr *MI = getInstructionFromIndex(index);
MachineBasicBlock *MBB = MI->getParent();
NewVReg = 0;
- if (TrySplitMI) {
+ if (TrySplit) {
std::map<unsigned,unsigned>::const_iterator NVI =
MBBVRegsMap.find(MBB->getNumber());
if (NVI != MBBVRegsMap.end()) {
@@ -977,7 +976,7 @@
// Update weight of spill interval.
LiveInterval &nI = getOrCreateInterval(NewVReg);
- if (!TrySplitMI) {
+ if (!TrySplit) {
// The spill weight is now infinity as it cannot be spilled again.
nI.weight = HUGE_VALF;
continue;
Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=44531&r1=44530&r2=44531&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original)
+++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Mon Dec 3 03:58:48 2007
@@ -276,7 +276,7 @@
SmallSet<MachineInstr*, 4> &ReMatDefs,
BitVector &RegKills,
std::vector<MachineOperand*> &KillOps,
- VirtRegMap &VRM);
+ VirtRegMap &VRM, bool StoreMaybeDead);
void RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM);
};
}
@@ -860,7 +860,7 @@
SmallSet<MachineInstr*, 4> &ReMatDefs,
BitVector &RegKills,
std::vector<MachineOperand*> &KillOps,
- VirtRegMap &VRM) {
+ VirtRegMap &VRM, bool StoreMaybeDead) {
MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC);
DOUT << "Store:\t" << *next(MII);
@@ -896,14 +896,15 @@
}
}
- LastStore = next(MII);
+ MachineInstr *NewStore = next(MII);
+ LastStore = StoreMaybeDead ? NewStore : NULL;
// If the stack slot value was previously available in some other
// register, change it now. Otherwise, make the register available,
// in PhysReg.
Spills.ModifyStackSlotOrReMat(StackSlot);
Spills.ClobberPhysReg(PhysReg);
- Spills.addAvailable(StackSlot, LastStore, PhysReg);
+ Spills.addAvailable(StackSlot, NewStore, PhysReg);
++NumStores;
}
@@ -985,8 +986,8 @@
unsigned Phys = VRM.getPhys(VirtReg);
int StackSlot = VRM.getStackSlot(VirtReg);
MachineInstr *&LastStore = MaybeDeadStores[StackSlot];
- SpillRegToStackSlot(MBB, MII, i, Phys, StackSlot, RC,
- LastStore, Spills, ReMatDefs, RegKills, KillOps,
VRM);
+ SpillRegToStackSlot(MBB, MII, i, Phys, StackSlot, RC, LastStore,
+ Spills, ReMatDefs, RegKills, KillOps, VRM, false);
}
}
@@ -1009,7 +1010,13 @@
assert(MRegisterInfo::isVirtualRegister(VirtReg) &&
"Not a virtual or a physical register?");
-
+
+ // Assumes this is the last use of a split interval. IsKill will be unset
+ // if reg is use later unless it's a two-address operand.
+ if (MO.isUse() && VRM.getPreSplitReg(VirtReg) &&
+ TID->getOperandConstraint(i, TOI::TIED_TO) == -1)
+ MI.getOperand(i).setIsKill();
+
unsigned SubIdx = MO.getSubReg();
if (VRM.isAssignedReg(VirtReg)) {
// This virtual register was assigned a physreg!
@@ -1440,7 +1447,7 @@
if (!MO.isDead()) {
MachineInstr *&LastStore = MaybeDeadStores[StackSlot];
SpillRegToStackSlot(MBB, MII, -1, PhysReg, StackSlot, RC, LastStore,
- Spills, ReMatDefs, RegKills, KillOps, VRM);
+ Spills, ReMatDefs, RegKills, KillOps, VRM, true);
// Check to see if this is a noop copy. If so, eliminate the
// instruction before considering the dest reg to be changed.
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