Author: asl Date: Tue Jan 15 01:02:33 2008 New Revision: 46001 URL: http://llvm.org/viewvc/llvm-project?rev=46001&view=rev Log: For PR1839: add initial support for __builtin_trap. llvm-gcc part is missed as well as PPC codegen
Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h llvm/trunk/include/llvm/Intrinsics.td llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.cpp llvm/trunk/lib/Target/X86/X86ISelLowering.h llvm/trunk/lib/Target/X86/X86InstrInfo.td Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=46001&r1=46000&r2=46001&view=diff ============================================================================== --- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original) +++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Tue Jan 15 01:02:33 2008 @@ -563,6 +563,9 @@ // chain as output. TRAMPOLINE, + // TRAP - Trapping instruction + TRAP, + // BUILTIN_OP_END - This must be the last enum value in this list. BUILTIN_OP_END }; Modified: llvm/trunk/include/llvm/Intrinsics.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Intrinsics.td?rev=46001&r1=46000&r2=46001&view=diff ============================================================================== --- llvm/trunk/include/llvm/Intrinsics.td (original) +++ llvm/trunk/include/llvm/Intrinsics.td Tue Jan 15 01:02:33 2008 @@ -266,6 +266,8 @@ // def int_flt_rounds : Intrinsic<[llvm_i32_ty]>, GCCBuiltin<"__builtin_flt_rounds">; +def int_trap : Intrinsic<[llvm_void_ty]>, + GCCBuiltin<"__builtin_trap">; //===----------------------------------------------------------------------===// // Target-specific intrinsics Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=46001&r1=46000&r2=46001&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Tue Jan 15 01:02:33 2008 @@ -3734,6 +3734,25 @@ break; } } + case ISD::TRAP: { + MVT::ValueType VT = Node->getValueType(0); + switch (TLI.getOperationAction(Node->getOpcode(), VT)) { + default: assert(0 && "This action not supported for this op yet!"); + case TargetLowering::Custom: + Result = TLI.LowerOperation(Op, DAG); + if (Result.Val) break; + // Fall Thru + case TargetLowering::Legal: + // If this operation is not supported, lower it to 'abort()' call + SDOperand Chain = LegalizeOp(Node->getOperand(0)); + TargetLowering::ArgListTy Args; + std::pair<SDOperand,SDOperand> CallResult = + TLI.LowerCallTo(Chain, Type::VoidTy, false, false, CallingConv::C, false, + DAG.getExternalSymbol("abort", MVT::Other), Args, DAG); + Result = CallResult.second; + break; + } + } } assert(Result.getValueType() == Op.getValueType() && Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=46001&r1=46000&r2=46001&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Tue Jan 15 01:02:33 2008 @@ -3770,7 +3770,8 @@ case ISD::BUILD_PAIR: return "build_pair"; case ISD::STACKSAVE: return "stacksave"; case ISD::STACKRESTORE: return "stackrestore"; - + case ISD::TRAP: return "trap"; + // Block memory operations. case ISD::MEMSET: return "memset"; case ISD::MEMCPY: return "memcpy"; Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=46001&r1=46000&r2=46001&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Tue Jan 15 01:02:33 2008 @@ -2932,6 +2932,11 @@ setValue(&I, DAG.getNode(ISD::FLT_ROUNDS, MVT::i32)); return 0; } + + case Intrinsic::trap: { + DAG.setRoot(DAG.getNode(ISD::TRAP, MVT::Other, getRoot())); + return 0; + } } } Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=46001&r1=46000&r2=46001&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Tue Jan 15 01:02:33 2008 @@ -294,6 +294,8 @@ setOperationAction(ISD::TRAMPOLINE, MVT::Other, Custom); + setOperationAction(ISD::TRAP, MVT::Other, Custom); + // VASTART needs to be custom lowered to use the VarArgsFrameIndex setOperationAction(ISD::VASTART , MVT::Other, Custom); setOperationAction(ISD::VAARG , MVT::Other, Expand); @@ -4948,6 +4950,10 @@ ISD::TRUNCATE : ISD::ZERO_EXTEND), VT, RetVal); } +SDOperand X86TargetLowering::LowerTRAP(SDOperand Op, SelectionDAG &DAG) { + return DAG.getNode(X86ISD::TRAP, MVT::Other, Op.getOperand(0)); +} + SDOperand X86TargetLowering::LowerCTLZ(SDOperand Op, SelectionDAG &DAG) { MVT::ValueType VT = Op.getValueType(); MVT::ValueType OpVT = VT; @@ -5052,6 +5058,7 @@ case ISD::FLT_ROUNDS: return LowerFLT_ROUNDS(Op, DAG); case ISD::CTLZ: return LowerCTLZ(Op, DAG); case ISD::CTTZ: return LowerCTTZ(Op, DAG); + case ISD::TRAP: return LowerTRAP(Op, DAG); // FIXME: REMOVE THIS WHEN LegalizeDAGTypes lands. case ISD::READCYCLECOUNTER: @@ -5091,6 +5098,7 @@ case X86ISD::CALL: return "X86ISD::CALL"; case X86ISD::TAILCALL: return "X86ISD::TAILCALL"; case X86ISD::RDTSC_DAG: return "X86ISD::RDTSC_DAG"; + case X86ISD::TRAP: return "X86ISD::TRAP"; case X86ISD::CMP: return "X86ISD::CMP"; case X86ISD::COMI: return "X86ISD::COMI"; case X86ISD::UCOMI: return "X86ISD::UCOMI"; Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=46001&r1=46000&r2=46001&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original) +++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Tue Jan 15 01:02:33 2008 @@ -197,7 +197,10 @@ TC_RETURN, // Store FP control world into i16 memory - FNSTCW16m + FNSTCW16m, + + // Trapping instruction + TRAP }; } @@ -484,6 +487,7 @@ SDOperand LowerEH_RETURN(SDOperand Op, SelectionDAG &DAG); SDOperand LowerTRAMPOLINE(SDOperand Op, SelectionDAG &DAG); SDOperand LowerFLT_ROUNDS(SDOperand Op, SelectionDAG &DAG); + SDOperand LowerTRAP(SDOperand Op, SelectionDAG &DAG); SDOperand LowerCTLZ(SDOperand Op, SelectionDAG &DAG); SDOperand LowerCTTZ(SDOperand Op, SelectionDAG &DAG); SDNode *ExpandFP_TO_SINT(SDNode *N, SelectionDAG &DAG); Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=46001&r1=46000&r2=46001&view=diff ============================================================================== --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original) +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Tue Jan 15 01:02:33 2008 @@ -57,6 +57,8 @@ def SDT_X86TCRET : SDTypeProfile<0, 2, [SDTCisPtrTy<0>, SDTCisVT<1, i32>]>; +def SDT_X86TRAP : SDTypeProfile<0, 0, []>; + def X86bsf : SDNode<"X86ISD::BSF", SDTIntUnaryOp>; def X86bsr : SDNode<"X86ISD::BSR", SDTIntUnaryOp>; def X86shld : SDNode<"X86ISD::SHLD", SDTIntShiftDOp>; @@ -107,6 +109,9 @@ def X86tcret : SDNode<"X86ISD::TC_RETURN", SDT_X86TCRET, [SDNPHasChain, SDNPOptInFlag]>; +def X86trap : SDNode<"X86ISD::TRAP", SDT_X86TRAP, + [SDNPHasChain, SDNPOutFlag, SDNPSideEffect]>; + //===----------------------------------------------------------------------===// // X86 Operand Definitions. // @@ -484,6 +489,11 @@ def RDTSC : I<0x31, RawFrm, (outs), (ins), "rdtsc", [(X86rdtsc)]>, TB; +let isBarrier = 1, hasCtrlDep = 1 in { +// FIXME: Should use 0x0F0B opcode +def TRAP : I<0, RawFrm, (outs), (ins), "ud2", [(X86trap)]>; +} + //===----------------------------------------------------------------------===// // Input/Output Instructions... // _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits