Author: baldrick Date: Sun Feb 10 04:08:52 2008 New Revision: 46926 URL: http://llvm.org/viewvc/llvm-project?rev=46926&view=rev Log: Add truncate and AssertZext result expansion.
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=46926&r1=46925&r2=46926&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Sun Feb 10 04:08:52 2008 @@ -209,6 +209,8 @@ void ExpandResult_ANY_EXTEND (SDNode *N, SDOperand &Lo, SDOperand &Hi); void ExpandResult_ZERO_EXTEND(SDNode *N, SDOperand &Lo, SDOperand &Hi); void ExpandResult_SIGN_EXTEND(SDNode *N, SDOperand &Lo, SDOperand &Hi); + void ExpandResult_AssertZext (SDNode *N, SDOperand &Lo, SDOperand &Hi); + void ExpandResult_TRUNCATE (SDNode *N, SDOperand &Lo, SDOperand &Hi); void ExpandResult_BIT_CONVERT(SDNode *N, SDOperand &Lo, SDOperand &Hi); void ExpandResult_SIGN_EXTEND_INREG(SDNode *N, SDOperand &Lo, SDOperand &Hi); void ExpandResult_LOAD (LoadSDNode *N, SDOperand &Lo, SDOperand &Hi); Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp?rev=46926&r1=46925&r2=46926&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp Sun Feb 10 04:08:52 2008 @@ -60,6 +60,8 @@ case ISD::ANY_EXTEND: ExpandResult_ANY_EXTEND(N, Lo, Hi); break; case ISD::ZERO_EXTEND: ExpandResult_ZERO_EXTEND(N, Lo, Hi); break; case ISD::SIGN_EXTEND: ExpandResult_SIGN_EXTEND(N, Lo, Hi); break; + case ISD::AssertZext: ExpandResult_AssertZext(N, Lo, Hi); break; + case ISD::TRUNCATE: ExpandResult_TRUNCATE(N, Lo, Hi); break; case ISD::BIT_CONVERT: ExpandResult_BIT_CONVERT(N, Lo, Hi); break; case ISD::SIGN_EXTEND_INREG: ExpandResult_SIGN_EXTEND_INREG(N, Lo, Hi); break; case ISD::LOAD: ExpandResult_LOAD(cast<LoadSDNode>(N), Lo, Hi); break; @@ -202,6 +204,34 @@ } } +void DAGTypeLegalizer::ExpandResult_AssertZext(SDNode *N, + SDOperand &Lo, SDOperand &Hi) { + GetExpandedOp(N->getOperand(0), Lo, Hi); + MVT::ValueType NVT = Lo.getValueType(); + MVT::ValueType EVT = cast<VTSDNode>(N->getOperand(1))->getVT(); + unsigned NVTBits = MVT::getSizeInBits(NVT); + unsigned EVTBits = MVT::getSizeInBits(EVT); + + if (NVTBits < EVTBits) { + Hi = DAG.getNode(ISD::AssertZext, NVT, Hi, + DAG.getValueType(MVT::getIntegerType(EVTBits - NVTBits))); + } else { + Lo = DAG.getNode(ISD::AssertZext, NVT, Lo, DAG.getValueType(EVT)); + // The high part must be zero, make it explicit. + Hi = DAG.getConstant(0, NVT); + } +} + +void DAGTypeLegalizer::ExpandResult_TRUNCATE(SDNode *N, + SDOperand &Lo, SDOperand &Hi) { + MVT::ValueType NVT = TLI.getTypeToTransformTo(N->getValueType(0)); + Lo = DAG.getNode(ISD::TRUNCATE, NVT, N->getOperand(0)); + Hi = DAG.getNode(ISD::SRL, N->getOperand(0).getValueType(), N->getOperand(0), + DAG.getConstant(MVT::getSizeInBits(NVT), + TLI.getShiftAmountTy())); + Hi = DAG.getNode(ISD::TRUNCATE, NVT, Hi); +} + void DAGTypeLegalizer::ExpandResult_BIT_CONVERT(SDNode *N, SDOperand &Lo, SDOperand &Hi) { // Lower the bit-convert to a store/load from the stack, then expand the load. Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=46926&r1=46925&r2=46926&view=diff ============================================================================== --- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original) +++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Sun Feb 10 04:08:52 2008 @@ -2018,6 +2018,7 @@ "Cannot *_EXTEND_INREG FP types"); assert(MVT::getSizeInBits(EVT) <= MVT::getSizeInBits(VT) && "Not extending!"); + if (VT == EVT) return N1; // noop assertion. break; } case ISD::SIGN_EXTEND_INREG: { _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits