Author: baldrick
Date: Mon Feb 11 05:09:23 2008
New Revision: 46956
URL: http://llvm.org/viewvc/llvm-project?rev=46956&view=rev
Log:
Add arbitrary integer support to getRegisterType and
getNumRegisters. This is needed for calling functions
with apint parameters or return values.
Modified:
llvm/trunk/include/llvm/Target/TargetLowering.h
Modified: llvm/trunk/include/llvm/Target/TargetLowering.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetLowering.h?rev=46956&r1=46955&r2=46956&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetLowering.h (original)
+++ llvm/trunk/include/llvm/Target/TargetLowering.h Mon Feb 11 05:09:23 2008
@@ -434,13 +434,18 @@
(void)getVectorTypeBreakdown(VT, VT1, NumIntermediates, RegisterVT);
return RegisterVT;
}
+ if (MVT::isInteger(VT)) {
+ return getRegisterType(getTypeToTransformTo(VT));
+ }
assert(0 && "Unsupported extended type!");
}
/// getNumRegisters - Return the number of registers that this ValueType will
/// eventually require. This is one for any types promoted to live in larger
/// registers, but may be more than one for types (like i64) that are split
- /// into pieces.
+ /// into pieces. For types like i140, which are first promoted then
expanded,
+ /// it is the number of registers needed to hold all the bits of the original
+ /// type. For an i140 on a 32 bit machine this means 5 registers.
unsigned getNumRegisters(MVT::ValueType VT) const {
if (!MVT::isExtendedVT(VT)) {
assert(VT < array_lengthof(NumRegistersForVT));
@@ -451,6 +456,11 @@
unsigned NumIntermediates;
return getVectorTypeBreakdown(VT, VT1, NumIntermediates, VT2);
}
+ if (MVT::isInteger(VT)) {
+ unsigned BitWidth = MVT::getSizeInBits(VT);
+ unsigned RegWidth = MVT::getSizeInBits(getRegisterType(VT));
+ return (BitWidth + RegWidth - 1) / RegWidth;
+ }
assert(0 && "Unsupported extended type!");
}
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