Author: sampo
Date: Wed Feb 13 01:06:12 2008
New Revision: 47051
URL: http://llvm.org/viewvc/llvm-project?rev=47051&view=rev
Log:
readme updates
Modified:
llvm/trunk/lib/Target/PowerPC/README_ALTIVEC.txt
llvm/trunk/lib/Target/X86/README-SSE.txt
Modified: llvm/trunk/lib/Target/PowerPC/README_ALTIVEC.txt
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/README_ALTIVEC.txt?rev=47051&r1=47050&r2=47051&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/README_ALTIVEC.txt (original)
+++ llvm/trunk/lib/Target/PowerPC/README_ALTIVEC.txt Wed Feb 13 01:06:12 2008
@@ -177,3 +177,12 @@
//===----------------------------------------------------------------------===//
+
+An alternative to the store/store/load approach for illegal insert element
+lowering would be:
+
+1. store element to any ol' slot
+2. lvx the slot
+3. lvsl 0; splat index; vcmpeq to generate a select mask
+4. lvsl slot + x; vperm to rotate result into correct slot
+5. vsel result together.
Modified: llvm/trunk/lib/Target/X86/README-SSE.txt
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/README-SSE.txt?rev=47051&r1=47050&r2=47051&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/README-SSE.txt (original)
+++ llvm/trunk/lib/Target/X86/README-SSE.txt Wed Feb 13 01:06:12 2008
@@ -781,3 +781,14 @@
insertions.
See comments in LowerINSERT_VECTOR_ELT_SSE4.
+
+//===---------------------------------------------------------------------===//
+
+On a random note, SSE2 should declare insert/extract of 2 x f64 as legal, not
+Custom. All combinations of insert/extract reg-reg, reg-mem, and mem-reg are
+legal, it'll just take a few extra patterns written in the .td file.
+
+Note: this is not a code quality issue; the custom lowered code happens to be
+right, but we shouldn't have to custom lower anything. This is probably
related
+to <2 x i64> ops being so bad.
+
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